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PA-RISC Processors

PA-7100LC (PCX-L)

Overview

The PA-7100LC, introduced 1994, was primarily designed as a single-chip solution for low cost systems while still delivering the performance of 1991 high-end workstations and servers. The CPU core design is close to the earlier PA-7100 and was integrated with several previously off-chip support components (FPU, MIOC, first-level cache) onto a single chip with direct GSC main bus attachment. Both CPU and FPU are 32-bit PA-RISC 1.1.

The successor of the PA-7100LC is the similar but improved PA-7300LC processor, released two years later.

Details

  1. Only one of the two integer ALUs is able to handle loads, stores and shifts, these operations can only be paired with simple math operations, like integer addition or multiplication. Both units can handle branch operations.

Used in

References

  1. PA7100LC ERS (External Reference Specification) (.pdf) Hewlett-Packard Company (1999)
  2. The PA 7100LC Microprocessor: A Case Study of IC Design Decisions in a Competitive Environment Mick Bass et al (April 1995: Hewlett-Packard Journal. Accessed May 2009)
  3. Design methodologies for the PA 7100LC microprocessor (.pdf) Mick Bass et al (April 1995: Hewlett-Packard Journal. Accessed May 2009)

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