No RISC No Fun
OpenPA is an independent technical resource on HP 9000 and PA-RISC computers and operating systems. Online since 1999 with more than 140 articles on PA-RISC, a technical computer architecture developed by HP in the 1980s and 1990s:
- Hardware: OpenPA covers HP PA-RISC architecture and processors from early RISC experiments in the 1980s to 64-bit multicore CPUs in custom HP RISC designs.
- Computers: HP released a wide array of PA-RISC computers, from servers, 3D workstations to mainframes in the HP 9000, Visualize and Integrity ranges.
- Operating: Unix was the operating system of choice on PA-RISC, with ports of HP-UX, Mach, BSD, Linux and many R&D and open source projects.
Information on OpenPA is based on PA-RISC technical references, handbooks and architecture documents, correlated with disappearing archives. OpenPA is independent of and does not represent HP in any way. Read the news, RSS and OpenPA book.
Also on OpenPA: RISC Laptop Archive and VLIW CPUs, computing history of the 1990s.
RISC Laptop: Toshiba SPARC LT AS1000
Another entry in the RISC Laptops series on 1990s Unix laptops with RISC processors: Toshiba SPARC LT laptops based on Sun SPARC architecture for Unix.
Toshiba SPARC LT AS1000 laptops were released in 1990 and were one of the first Unix laptops developed with still early RISC technology in the 1980s.
SPARC LT were close to Sun SPARCstations (1+ or 2) but needed modified SunOS for the custom Toshiba system design. After the original SPARC-based L10 and E10 versions, Toshiba added SuperSPARC C60, C70 and C80 models a few years later with newer CPUs, but it seems in only a very limited fashion.
Contemporary reviews in the early 1990s were unsure on the need for mobile engineering computers:
Some experts have questioned the need for laptop workstations because the scientists and engineers who use them are often networked into high-powered mainframes. As a result, the advantages of portability are not as clear-cut as they would be for personal computer users.
Toshiba SPARC LT laptops were sold primarily in Japan, priced at ¥1,980,000, but were marketed pretty intensively in the US and Europe.
New OpenPA Book Edition 3.0
A new edition of the OpenPA PA-RISC Book has been released. Available as PDF, the Book of PA-RISC is in its fourteenth release, now in Edition 3.0 with more than 500 pages of PA-RISC information! Much new PA-RISC content has been added and many existing chapters revised and extended.
Some of the major changes since the last release:
- PA-RISC Architecture and Precision
- HP Visualize Intel-based Workstations
- HP Visualize 3D accelerators
- HP Visualize for Intel graphics
- Unix games for HP-UX
- ATI and nVIDIA graphics for PA-RISC and Itanium
- Research operating systems for PA-RISC
- More HP-RT content
- PA-RISC performance and SPECtable
- SAIC Talon portable computer
- QEMU PA-RISC emulation
Download the OpenPA Book of PA-RISC
(PDF, 2.0 MB, 541 pages, 2025, V3.0)
Includes all content from the OpenPA Winter 2025 online version.
Emulating PA-RISC computers with QEMU
QEMU is an open source computer emulation and virtualization software for many different computer systems. It includes support for many RISC architectures besides x86, with PA-RISC emulation since 2018. Current QEMU version is 9.2.0.
QEMU emulates a complete computer in software without the need for specific virtualization hardware. With QEMU, a full HP Visualize B160L and C3700 workstation can be emulated to run PA-RISC operating systems. QEMU emulates PDC, I/O routines and hardware so the emulation appears as a complete system to the operating system.
Most PA-RISC operating systems should work under QEMU emulation of HP B160L and C3700 PA-RISC workstations. OpenPA tested a few of those systems in late 2024.
- HP-UX: Made HP-UX 10.20 and 11.00 work with CDE
no luck with 9.07 and 11.11 - Linux on PA-RISC supposedly works, did not test
- NetBSD/hppa supposedly works, did not test
- OpenBSD/hppa 7.6 did install from CD but crashes on restart of the installed system
- NeXTSTEP 3.3 boots but the installer crashes
possibly missing QEMU drivers - MkLinux supposedly works partially
There are some configuration and command hints for using QEMU on PA-RISC.
RISC of the 90s: Intel iWarp VLIW Processors
A very forgotten VLIW architecture of the late 1980s:
Intel iWarp is a combined VLIW and RISC computer architecture that coupled a 32-bit CPU core with long instructions and powerful communication support
to enable meshed computers for powerful parallel computing with >20 GFLOPS.
Intel iWarp was jointly developed between Intel and Carnegie Mellon University, supported by DARPA (DoD) in the late 1980s.
It was based on the earlier CMU Warp, a programmable systolic array
for meshed computing and communications.
Computers with up to 1,024 CPUs could be closely coupled for signal processing with potential military uses.
Intel shipped first iWarp computers with 64 nodes to CMU in 1991 and sold iWarp computers until iWarp was integrsted into the Supercomputing Systems Division at Intel.
Chips were military-grade, as the i386 process used for manufacturing was approved by NASA and pretty rad-hard.
There were multiple iWarp configurations available by Intel:
- Quad Cell Board (QCB) with four iWarp processors
- Card Cage Assembly (CCA) with four QCBs = 64 iWarp processors (8x8 torus), a typical iWarp system
- System Cabinet with four CCAs = 256 nodes
- Multi-Cabinet with four System Cabinets = 1024 nodes
- Variations of these in other form-factors and interfaces
Intel iWarp computers used a narrow set of software and development components: RTS (Run Time System) kernel, Pathlib for systolic communication, C and assembler, Fortran 77, Apply.
RISC of the 90s: Sun MAJC VLIW Processors
Another forgotten VLIW processor of the 1990s:
Sun MAJC is a VLIW architecture developed by Sun for media and signal processing.
Sun produced one MAJC processor in 1999, MAJC-5200, a high performance general purpose microprocessor
for multimedia and Java computing.
Reviewers of the late 1990s were ecstatic:
Doubts that VLIW has succeeded RISC as the most important influence on new microprocessor architectures vanished
at the time when Sun pulled the latest example out of its hat: MAJC (pronounced magic).
MAJC is a scalable architecture that exploited multiple forms of parallelism, a hot topic of 1990s microarchitecture.
MAJC was multiprocessing capable with vertical micro-threading
and very long instruction word (VLIW) for multiple instructions per cycle.
The single MAJC-5200 processor had two CPU cores with each four functional units, a central crossbar and was four instructions wide.
Planned for multimedia portal PCs with Java and high-end graphics, Sun MAJC processors wound up in two Sun XVR accelerators in the early 2000s.
Its 6 Gigaflops performance was downright scary
but commercial success eluded the MAJC CPUs.
There was no binary compatiblity to anything and the Java link was tenous.
RISC of the 90s: Philips TriMedia VLIW Processors
New series on forgotten VLIW and RISC Processors of the 1990s with Philips Trimedia VLIW as first article. The series was motivated by the HOT CHIPS conferences with so many unknown CPUs of the 90s.
Philips TriMedia is a range of 32-bit VLIW processors for media processing released during the 1990s: TM-1000 was the first CPU, released in 1996, followed by TM-1100 in 1998 and TM-1300 (PNX1300) in 1999.
TriMedia was based on original VLIW work at Philips research in the 1980s for general computing. Actual production TriMedia VLIW processors in the 1990s were more specialized for media computations. They could issue five instructions per clock for any of their 27 (!) functional units at clock speeds between 100 and 166 MHz.
They were mostly used in audio, video and photo devices as media co-processors for video conferencing, web and CCD cameras, video editing, HDTVs and video mail (?!).
More VLIW and RISC processors will be detailed in this series on the 1990s.
RISC Laptop: IBM WorkPad z50
Another entry in the RISC Laptops series on 1990s Unix laptops with RISC processors: IBM WorkPad z50.
It looks like a Thinkpad, but it’s not.
The WorkPad z50 is a mobile companion
released by IBM in 1999 with MIPS processor for Windows CE.
Aimed at the fledging handheld PC and PDA market of the late 90s, z50 were almost laptops but still had a RISC processor: NEC VR4121, a 64-bit MIPS processor.
IBM WorkPad z50 was a small system with a 8.2″ DSTN screen, weighing 2.66 lbs in a compact 8.0″ x 10.2″ x 1.0″ case. Operating system and applications were in ROM modules with a focus on personal productivity on embedded Windows CE 2.11. It had pretty positive reviews in the PDA/HPC market of the turn of the century.
SAIC Talon PA-RISC Portable Severe Workstations
SAIC apparently produced another PA-RISC portable computer in the mid-1990s: the SAIC Talon. Compared to the well-known boxy Galaxy 1100, the Talon is even more rugged at almost 50 pounds and integrated a 32-bit HP 9000 712 PA-RISC system design into a military portable case.
SAIC Talon PA-RISC portables were apparently produced as part of the US Navy TAC-4 program, under which HP provided PA-RISC gear to the Navy, supported by SAIC for rugged computers in severe
environments.
The prior SAIC Galaxy was already pretty rugged but the Talon added to this with extensive military requirements for shock, sound, rain, airborne and Fungus: No growth.
Also based on HP 9000 712 workstation design, SAIC added PCMCIA for extensions and an EISA bus slot for interfaces, to which a VME adapter could be connected. SAIC Talons are almost unknown today with only very few public information available since then. Talons are mentioned in SAIC websites from 1996 but it remains unclear if and how these computers were actually productized.
Hot Chips Conference: RISC in the 1990s
HOT CHIPS is an IEEE conference on microprocessors and microcomputers, organized yearly since 1989. Almost all cutting edge RISC and computer architectures of the 1990s were presented at HOT CHIPS over the years, PA-RISC information can be found at the conference in HP presentations between 1991 and 1999.
Most historic HOT CHIPS programs and proceedings are available in archives, after having been hosted until the 2010s at official HOT CHIPS. These older HOT CHIPS presentations offer an interesting glimpse into the wildly diverse CPU landscape of the 1990s. Some notable PA-RISC presentations at HOT CHIPS:
- PA-RISC Processor for Snakes Workstation, Hewlett Packard, HOT CHIPS 3 (1991)
- A 200 MFLOP HP PA-RISC Processor, Hewlett Packard, HOT CHIPS 4 (1992)
- Multiprocessor Features in a PA-RISC Processor Interface Chip, Hewlett Packard, 1992
- Hummingbird: A Low-Cost Superscalar PA-RISC Processor, Hewlett Packard, HOT CHIPS 5
- System Design Verification of the HP735 VLSI, Hewlett Packard, HOT CHIPS 5 (1993)
- A Single-Chip Workstation Graphics System, Hewlett Packard, HOT CHIPS 5 (1993)
- Multimedia Enhancements for PA-RISC Processors, Hewlett Packard, HOT CHIPS 6 (1994)
- Memory Performance Features of the 64-bit PA-8000, Hewlett Packard, HOT CHIPS 7, ’97
- A 150MHz Superscalar RISC Processor with Pseudo Vector Processing Feature, Hitachi, HOT CHIPS 7 (1995)
- The HP PA-8000 RISC CPU: A High Performance Out-of-Order Processor, Hewlett-Packard, HOT CHIPS 8 (1996)
- Effectiveness of the MAX-2 Multimedia Extensions for PA-RISC 2.0 Processors, Hewlett-Packard, HOT CHIPS 9 (1997)
- Techniques for Mitigating Memory Latency in the PA-8500 Processor, HOT CHIPS 10 ’98
Wanted: Hardcopy COMPCON digests 1982-1999
OpenPA is looking for hardcopy digests of COMPCON, the Computer Conference of IEEE International from the 1980s and 1990s. Physical copies turn up only rarely and most are buried within libraries and could be retired or discarded soon.
Much PA-RISC history was presented at COMPCON conferences and many interesting articles hide in the digests of Intellectual Leverage for the Information Society conferences on the RISC era of the 1980s and 1990s. These articles would be welcome additions to OpenPA information on PA-RISC.
We are loooking for conference proceedings of:
- COMPCON 1982 High technology in the Information Industry;
- COMPCON 1983 Intellectual Leverage for Information Technology
- COMPCON 1984 Intellectual Leverage for Driving Technologies
- COMPCON 1985 Technological Leverage
- COMPCON 1986 Digest of Papers
- COMPCON 1987 Intellectual Leverage
COMPCON 1988 Intellectual Leverage- COMPCON 1989 Intellectual Leverage
- COMPCON 1990 Intellectual Leverage
- COMPCON 1991 Intellectual Leverage
- COMPCON 1992 Intellectual Leverage
- COMPCON 1993 Intellectual Leverage
- COMPCON 1994 Intellectual Leverage
- COMPCON 1995 Technologies for the Information Highway
COMPCON 1996 Technologies for the Information Highway- COMPCON 1997 Technologies for the Information Highway
- COMPCON 1998 Digest of Papers
- COMPCON 1999 Digest of Papers
OpenPA would be glad to take used or surplus hardcopies of COMPCON digests as they become available for our PA-RISC archive and the RISC era. 10x
spectable – SPEC Benchmark results from 2000
The processing power of Unix and RISC computers was often measured by industry benchmarks to compare the speed with other vendors. Frequently used in the 1990s and 2000s were SPEC scores in CPU92, CPU95 and CPU2000 varieties, as quoted in press releases, magazines and websites for comparing CPUs and workstations.
During the 1990s, John DiMarco regularly posted collected SPEC benchmark scores to USEnet groups. His spectable contained SPEC92 and SPEC95 results from many different sources collected over time. Last releases of the table were in late 2000, when official results became more easily available and SPEC switched to SPEC2000.
SPEC, Standard Performance Evaluation Corporation, is a non-profit corporation founded in 1988 by workstation vendors to develop fair and useful set of metrics to differentiate
Unix and computer systems.
SPEC both developed the benchmarks, source code and testing methodology and published the results in regulary publications.
Relevant for PA-RISC are scores from SPEC’s Open Systems Group (OSG) for processor and system benchmarks in an UNIX/NT/VMS environment,
including SPEC92, SPEC95 and SPEC2000 integer and FP scores for computing speed and SPEC95 and SPEC2000 rate scores for throughput (SMP capacity).
SPEC scores were always compared to a reference system, a DEC VAX11/780 for CPU92, Sun SPARCstation 10/40 for CPU95 and Sun Ultra 5 for CPU2000.
DiMarco’s spectable disappeared around 20 years ago and is only available anymore on archive.org. Following are excerpted SPEC CPU92 scores for various vendors and CPU architectures from his table, dated Dec 8, 2000.
Some favorite SPECint92 and SPECfp92 scores from VAX over i486 to R8000:
System CPU ClkMHz Cache SPECint SPECfp Info Source Name (NUMx)Type ext/in Ext+I/D 92 92 Date Obtained ================= ========== ======= ========== ======= ======= ===== ========= DEC VAX11/780 VAX 5 8 1.0 1.0 Jan89 SPEC Ref DEC VAX4000/60 KA46 22.2 ? 11.1 12.6 Mar93 DECinfo DEC 3000/300 A21064 30/150 256+8/8 66.2 91.5 Apr93 c.sun.mc DEC 5000/20 R3000 20 64/64 13.5 18.4 Jun93 DECinfo DG 5225 2x88100 25 128/128 20.3 12.1 May93 c.sun.hw HP 712/60 PA7100LC 60 64 67.0 85.3 Jun95 www.hp HP C110 PA7200 120 256/256 167 269 Dec95 www.hp HP 897S PA7100 96 1M/1M 78.3 141.6 Sep92 SPEC news IBM 340 POWER 33 8/32 27.7 51.9 Oct92 c.arch Sun SS/IPX FJMB86903 40 64 21.8 21.5 Nov92 Sunflash Sun SS20/151 HyperSP 50/150 512+8/0 169.4 208.2 Nov95 SunWorld SGI PowerIndigo2 R8000 75 2M+16/16 113 269 Oct95 www.sgi Intel 486DX 80486 50 256+8 30.1 14.0 Oct92 c.arch Intel Xpress Pentium 60 256+8/8 70.4 55.1 Mar95 www.intel
There are more archived SPEC CPU92 and CPU95 results from many vendors.
PA-RISC Performance compared to other RISCs
Comparing the speed of CPU architectures is a very complex and sometimes futile undertaking, as the platform around processors might be much more significant than the actual ISA. Still, it is historically interesting to see how different RISC architectures fared against each other in the RISC/Unix world of the 90s.
While PA-RISC processors were usually faster than their competition at the same clock speed, they were expensive to fabricate. Their platform, HP 9000 with PA-RISC and HP-UX, was usually exclusively priced in the 1980s and 1990s, compared to other Unix vendor ecosystems. PA-RISC was thus often used for technical workloads that made use of their strengths in floating point and numerical processing.
The main competitors of PA-RISC were other Unix platform vendors with their own RISC architectures: Sun SPARC (Solaris), Digital Alpha (Tru64 and OSF), SGI with MIPS (Irix), and IBM POWER (AIX and others). In the late 1990s, Intel Pentium and P6-based sucessors became also serious competitors (Windows and Linux).
Relative performance between computers and architectures can be compared by benchmark scores like the SPEC suite, often used to benchmark CPU and throughput performance. For the Unix and RISC systems covered here, SPEC95 and SPEC2000 had the greatest match, using the CPU integer (CINT) and floating point (CFP) results.
How PA-RISC fares agains other 1990s RISCs is broken down by PA-RISC processor with a table of SPEC results added with other architectures as comparison.
More HP-RT Real-Time Archaeology
Much more documentation for the relative obscure HP-RT real-time operating system for PA-RISC has been unearthed. HP-RT was an operating for HP 9000 740 VME instrumentation computers, released between 1993 and 1997 to offer real-time functionality for PA-RISC VME computers, POSIX 1003.1 and POSIX 1003.4 compatible.
Documentation includes HP-RT manuals and articles of the HP Integrated Systems Division, now archived in long forgotten websites and hosted at archive.org
- HP-RT Overview, HP-RT Datasheet and HP-RT Release Model Hewlett-Packard (1997)
- HP-RT Quick Reference Hewlett-Packard (1997)
- HP-RT Reference Volume 1 and Volume 3 Hewlett-Packard (1997)
- VME Backplane Networking Administration Guide, Hewlett-Packard (1997)
- HP-RT Symbolic Debugger Users Guide Hewlett-Packard (1997)
- Using STREAMS in the HP-RT Environment Hewlett-Packard (1997)
- X11 SERVERrt Installation and Configuration Guide, Hewlett-Packard (1997)
More documents on HP 74x PA-RISC VME computers also became available, all from HP, now at archive.org
- HP Real-Time Computer Automates Pharmaceutical Production, Hewlett-Packard (2000)
- HP’s real-time computing beats high-imaging speed, Hewlett-Packard (2000)
- Model 744/132L and 744/165L Model 744rt/132L and 744rt/165L Product page, Ordering Guide (with prices), Compatibility Matrix, Hewlett-Packard (2000) archive.org
HP-RT and HP 740 VME computers had a rather short shelfspan and were discontinued in 2002 as customers had migrated rapidly elsewhere. Both had many medical and military uses for imaging, radar and signals.
Research Operating Systems of the 1990s on PA-RISC
The golden 1990s were a period of experimentation and change in the computing world. Many different hardware architectures (RISC, CISC, VLIW) and platforms (Sun, DEC, IBM, HP) competed for hardware buyers, as did operating systems. PA-RISC was right in the middle of this, though HP itself was rather conservative.
Unix was the operating system of choice for PA-RISC since the 1980s with HP-UX in many different versions for HP 9000 computers.
Soon academia became interested in the new
PA-RISC architecture for newer operating system ports and research.
The University of Utah and the Open Group (OSF) played major roles in the 90s in this.
First was Utah’s HPBSD, an orthodox 4.3BSD, first ported to HP 9000 m68k machines, later extended to 4.4BSD and PA-RISC; a rather complete but very exclusive operating system. This was followed by research projects with Mach microkernel, first Mach 3/UX by Bob Wheeler in 1991, later extended to Mach 4/Lites in 1994.
OSF/1 Unix was also ported to PA-RISC, first by HP in 1990 with early OSF/1 1.0 using Mach 2.0 microkernel. Later on, the Open Group Research Institute (OSF RI) ported OSF/1 semi-commercially to PA-RISC as MK-PA, a rather complete system but exclusively licensed. MK-PA was pretty performant compared to HP-UX, especially in high-user workloads, with good HP-UX compatibility (for Framemaker and Mosaic).
Based on earlier Mach and MK-PA work, a MkLinux port to PA-RISC was released in 1997. MkLinux was a project from Open Group and Apple, based on Mach microkernel and often used for Apple PowerPC computers in the 1990s. With HP support, MkLinux was ported to PA-RISC was a first, snapshop release in 1997. MkLinux on PA-RISC (HPPA) was never a formal MkLinux release; it was a rather complete operating system with limited hardware support and stability however.
Another micro-kernel operating system was Chorus by INRIA, ported as research project to PA-RISC in 1990 at the Oregon Graduate Institute (OGI). It was based on Chorus v3.3/MiX with very limited hardware support and functionality, later extended to v3.4.
Some of these systems were stable alternatives to HP-UX but had very limited distribution and strict licensing. The research operating systems for PA-RISC with better availability were in turn limited in hardware support, stability and performance. This was mitigated in the early 2000s with mainline Linux and OpenBSD.
| Year | HP-UX | NeXTSTEP | HPBSD | Mach 3 | Mach 4 | OSF/1 | MkLinux | Linux | OpenBSD | NetBSD |
|---|---|---|---|---|---|---|---|---|---|---|
| Type | Unix | Research | Open Source | |||||||
| 1989 | █ █ | █ | ||||||||
| 1990 | ▒ | █ | ▒ | |||||||
| 1991 | █ | ▒ | ▒ | ▒ | ||||||
| 1992 | █ | ▒ | ||||||||
| 1993 | ▒ | █ | ||||||||
| 1994 | ▒ | █ | ▒ | █ | ||||||
| 1995 | █ | ▒ | █ | |||||||
| 1996 | █ █ | █ | █ | |||||||
| 1997 | █ █ | ▒ | ||||||||
| 1998 | ▒ | ▒ | ▒ | |||||||
| 1999 | ▒ | ▒ | ▒ | |||||||
| 2000 | █ █ | ▒ | ▒ | |||||||
The Internet never forgets – OpenPA and fleeting PA-RISC information since 1999.
Download the OpenPA Book of PA-RISC
(PDF, 2.0 MB, 541 pages, 2025, V3.0)
Includes all content from the OpenPA Winter 2025 online version.
OpenPA RSS feed with all news.