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Apollo Domain 10000 PRISM Computers

By Paul Weissmann on 28 December 2022

The DN10000 were designed by Apollo based on their own PRISM RISC architecture at the end of the 1980s, before HP bought Apollo and integrated it with the HP 9000 lineup. The Apollo Domain 10000 series were marketed as personal supercomputer geared for complex workstation applications like electronic design automation (EDA) and mechanical computer-aided design and engineering (MCAD/MCAE).

PRISM was the RISC processor released by Apollo in 1988 and the first commercial CPU architecture to include a VLIW (Very Long Instruction Word) design. The processors were used in Apollo's own Domain line of computers, with a PRISM II processor already being planned and designed. After the acquisition by HP in 1989, Apollo products were integrated into the HP line up, the workstations were carried on for a few years under HP/Apollo branding. HP consolidated Apollo into their workstation business unit with Apollo co-branding on the HP 9000 RISC workstations for a few years but in the end HP concentrated on PA-RISC.

PA-RISC Research Operating Systems in Detail

By Paul Weissmann on 25 December 2022

PA-RISC was used for many research projects in the late-1980s until the mid-1990s, a time when microkernels were popular in research. Many research operating systems were Mach-based or leaned on it, from HP, Open Group (OSF) and the University of Utah. The content on these systems has been split out into separate pages with details:

• MkLinux: a research project from the mid-1990s by the Open Group/OSF to port a Linux kernel onto a Mach microkernel, based on the MK-PA OSF/1 port to PA-RISC.
• HPBSD from the University of Utah which was a late-1980s port of 4.3BSD and later 4.4BSD to early 800s servers and 700s workstations.
• Mach: Several ports of the Mach microkernel were done during the early 1990s, with HP Tut porting Mach 2.0 and the University of Utah both Mach 3 and Mach 4 Lites.
• OSF/1: Porting efforts for OSF/1, the Unix operating alliance of DEC, IBM, HP and others to compete with AT&T/Sun System V Unix, started around 1990 with HP OSF/1 and MK-PA in the mid-1990s from OSF RI Open Group Research Institute.

Only MkLinux and Mach 4/Lites were publically available, the others required licenses for commercial or NDA source code they contained. Interest in Mach died down and the ports were suceeded by open source ports in the early 2000s, which borrowed heavily from their code and documentation. Mach was commercialized eventually with NeXTSTEP on PA-RISC in 1994, and iconic Mac OS X, itself based on Mach and influences from NeXTSTEP.

The OpenPA history books since 1999

By Paul Weissmann on 5 December 2021

Much has happened since the founding years of this PA-RISC information platform in long-ago 1999, so some historiography on OpenPA is in order, more detailed in About OpenPA.

It all started in 1999 when second-hand PA-RISC systems became affordable after being phased out for Windows NT or Linux. Not much PA-RISC information was easily available on the web then — Google just started and Wikipedia did not exist yet. The most active phase of OpenPA were the years of 1999-2004 with most original content written.

OpenPA updates tapered off between 2005-2008 with a spike in 2008 producing lots of new content on 64-bit PA-RISC. Update frequency and additions stalled considerably between 2009 and 2017 with mostly low-intensity maintenance and reordering content. Beginning in 2018, many pages were updated, much outdated text rewritten and some bad ideas from previous decades reversed.

There have been over 120 news entries for major changes to OpenPA over the years:

Year	Changes	Content	Backend
1999	Started	PA-RISC overview from the 90s	Frames, dark-mode
2000	7	HP 9000 700s, operating systems	Hosted at sunhelp
2001	7	32-bit processors, hardware, more systems	mickey@ appeared
2002	21	BSD, A/B/C/J lettered-systems, some 64-bit, X-Terms	Renamed, own server
2003	30	Complete 64-bit, four-digit systems, 3rd-party, more OS
2004	14	Benchmarks, FOCUS, graphics, SCSI, architecture	Complete revamp, CSS
2005	3	Small updates
2006	4	Final PA-RISCs - Mako, C8000	OpenPA Book
2007	3	History, small updates	Limited paperback
2008	18	Mainframe/Cell, Itanium, 1980s PA-RISC, others
2009	3	CPU and I/O architecture, much cleanup	10y anniversary
2010	2	T-Class, chipsets
2011
2012	1		OpenPA Book update
2013
2014	1	Cleanup and housekeeping
2015	2	Handle disappearing sources and documents
2016	6	Restructure chipset content, timeline, cleanup
2017
2018	3	PA-RISC story, OS updates, disappearing sources	Cloud move
2019			20y anniversary
2020	3	Agilent PA-RISC, many systems updates
2021	2	Content mopup, OS history	Backend mopup

PA-RISC Operating Systems History

By Paul Weissmann on 17 March 2021

Operating systems for PA-RISC computers have a history that started in the 1980s in parallel to the release of early PA-RISC servers and computers. Many Unix and similar operating systems were made available, first the early commercial HP-UX PA-RISC releases, followed by a plethora of research and development projects centered around the Mach microkernel and BSD Unix versions.

The heydays of PA-RISC operating systems were certainly in the 1990s with broad support and variety in concepts. During the early 2000s with the roadmap to 64-bit computing fulfilled, supported peaked in the commercial HP-UX 11.* releases. Significant support in mainstream open source projects got traction in the early to mid-2000s, with solid Linux and OpenBSD support in that decade.

The page on PA-RISC Operating Systems History with the detailed yearly timeline and content on individual projects history has been split from the main PA-RISC Operating Systems page.

Slight mop-up — into the 4th decade

By Paul Weissmann on 14 March 2021

The OpenPA frontend and backend have been cleaned and streamlined, plus the design was adjusted slightly for the 21st century.

OpenPA has witnessed four decades now, beginning with the birth of this site at the tail-end of the wild 1990s. The intense 2000s were the most active OpenPA years, where most of the PA-RISC content was written. Interest in PA-RISC and generally in non-mainstream IT platforms tapered off in the 2010s — making OpenPA rather dormant in that decade, with a few ideas left for the fourth decade of the 2020s:

• Superdome pages, focused on the PA-RISC versions
• rp74* and rp84* server system pages
• Proper article on PA-RISC operating systems history
• More Itanium rx computer pages
• Article on the PA-RISC to Itanium transition
• More information on PA-RISC in non-HP computers

We will see if any of that will be realized.

New OpenPA Print Edition release (2.7)

By Paul Weissmann on 26 July 2020

There is a new OpenPA print edition - the 11th release of the Book of PA-RISC since July 2006. This update includes all changes between the last edition from 2018 and now:

• HP 9000 and PA-RISC Computers Story article added
• OpenPA.net turned twenty in 2019
• Many updates to PA-RISC computers articles
• HP 9000 520 FOCUS article updated
• HP 9000 743/744 VME article update and extended for VXI boards
• PA-RISC in US Navy DTC and TAC information added
• Many revisions and corrections (thanks!)
• HP Agilent 16600 and 16700 PA-RISC logic analyzers article added

Download the OpenPA Print Version, Edition 2.7 (PDF, 772 KB)

HP Agilent 16600 and 16700 PA-RISC logic analyzers added

By Paul Weissmann on 4 January 2020

The HP Agilent 16600 and 16700 series are logic analyzers with PA-RISC processors sold by HP and Agilent, based on PA-RISC HP 9000 workstation architecture from the mid-1990s. These were the successors to the Agilent 16500 series analyzers and used in engineering and science for measurements, logic analysis, prototyping and verification. All variants are based on the same 16700A or 16700B main logic board built into different chassis’ with the system architecture probably related to the B132L/B160L workstations with some custom I/O hardware and buses.

• 16600A: Small base system with integrated channel probes.
• 16700A: Base system in a modular frame, with measurement and emulation slots.
• 16700B: Updated 16700 base system with faster components.
• 16701A/16701B: An expansion frame to extend the 16700 series systems.
• 16702A: Integrated 16700 in a compact case with LCD display.
• 16702B: Updated 16702 integrated system with faster components.

These 16600 and 16700 were released between 1998 and 2000 by HP then Agilent and ran stock HP-UX with Agilent extension and HP LOGIC.

Updates to PA-RISC and HP 9000 systems pages

By Paul Weissmann on 3 January 2020

Various updates have been done and integrated into OpenPA, including new content, corrections and streamlining:

• PA-RISC Computers and HP 9000 and PA-RISC Computers Story pages updated and revised, content additions, some restructuring and harmonization between the pages.
• HP 9000 500 FOCUS system page updated and revised (that was some seriously old content!).
• HP 9000 743/744 VME page updated and information on VXI systems added.
• US Navy DTC and TAC information added: HP 9000 computers were used in several US Navy contracts as tactical computers, HP 9000 520 (9020C) as DTC and JOTS computer in the 1980s, HP 9000 720, 730 workstations in the TAC-3 program, and a large range of workstations and servers in the TAC-4 program, the company’s largest-ever federal contract at the time, with 712, C-Class and J-Class workstations D-Class and K-Class servers and SAIC Galaxy portables.
• Historic list prices updated and added again to some system pages again – rather unreliable data after all these years. This is ongoing.
• Additions and fixes to the language on the individual HP 9000 systems pages

Twenty years OpenPA.net!

By Paul Weissmann on 1 December 2019

OpenPA.net turns twenty this year! It's been a long and interesting ride since this site was founded in December 1999, at a time of the Internet when Google just started and Wikipedia did not exist yet.

The idea was a central single resource for information on PA-RISC Unix computers, which became available more widely in the hobbyist market in the late 1990s and early 2000s. Development and contributions to OpenPA.net peaked in the early years of 1999-2002 with a community around PA-RISC and open source systems. Most of the PA-RISC and HP 9000 content was written and completed in the early 2000s. Updates slowly declined from the mid-2000s on, as did support by open and commercial operating systems. The site has been maintained since then to catch errors and add missing pieces here and there.

HP 9000 and PA-RISC Computers Story

By Paul Weissmann on 14 January 2018

An attempt to tell the story of HP 9000 and PA-RISC computers from the 1980s to the 2000s, this article tries to unify all the different leads and streams of HP 9000 and PA-RISC into a long, single story. The HP 9000 Series of computers spanned almost three decades and very diverse platforms of Unix computers. The article focuses on the PA-RISC part of that story, beginning with the formative HP 9000 800 servers in the late 1980s through the rise and renaming in the 90s until the big RISC and Unix contraction of the 2000s.

The article used much of the information available on OpenPA for years, and structured and compressed it into a single story. There is more to be written on the architecture and market side of things in the future. Along the way, many pages and sections on OpenPA were revised or rewritten altogether.

PA-RISC sources and accuracy

By Paul Weissmann on 3 January 2018

A process that started during the mid-2000s seems to be deepening now in the late-2010s — more and more information and sources from the early (public) Internet days of the 1980s and 90s are disappearing from the web, with magazines and journals closing, companies merging and people and memory passing away. This includes much of the PA-RISC documentation, either official or third-party. Some of it might be preserved at archive.org or mirrored in archives around the web, but the availability of definitive documentation and official sources just keeps diminishing. There are laudable initiatives out there, but it is getting harder writing articles on this decades-old technology.

All that is saying is there might be inaccuracies in the information on this site, it is getting difficult finding valid sources. This might just be the transitional nature of the Internet, but it was surprising to see so much go.

PA-RISC Operating Systems updated

By Paul Weissmann on 2 January 2018

The PA-RISC Operating Systems page has been updated with new content. An overview table has been added as a cross-reference for which PA-RISC operating systems support which PA-RISC computers. The information on the history of PA-RISC operating systems has been extended as well, with sections on Commercial Unix, research projects, open source and other systems.

On related news, this site turned eighteen last year!

PA-RISC Chipsets separate pages

By Paul Weissmann on 18 November 2016

The PA-RISC Chipsets page has been split into separate sub-pages for each chipset and system design (ASP, LASI, Stretch ...). This should enhance the readability and usability as the original page got just too long. Much content had been added in the years before on bus design, system architecture and individual chips and attachments. Additionally, information on system design has been added to the main PA-RISC systems and individual systems pages.

The following individual pages were added: PA-RISC Chipsets, Early designs, ASP/Viper, LASI, U2/UTurn, Astro, Stretch, Superdome/Cell, PA-RISC on Itanium zx1.

OpenPA 2015-2016 Site Maintenance

By Paul Weissmann on 21 January 2016

Many parts of the OpenPA site were updated, revised and cleaned up between the end of 2015 and January 2016, after a long hiatus. There had been no overt updates for years, but some effort was taken recently to bring parts of the content to a current state again and smoothen various rough edges.

• OpenBSD/hppa and NetBSD/hppa operating system pages updated to more current status
• PA-RISC Other Operating Systems page rewritten and cleaned up
• PA-RISC Hardware and PA-RISC Chipsets pages greatly rewritten (posted earlier)
• New and unified PA-RISC Timeline (posted earlier)
• Many PA-RISC Computers pages rewritten, updated and verified
• Review of external product documentation URLs (removal of 404s and finding alternates)
• Flush out some of the collected content here and there (timeline, prices, systems)
• New OpenPA Print Edition (2.5), with many changes and a large rewrite of the TeX/XML backend
• HTML and CSS of the overall site cleaned up

New OpenPA Print Edition release (2.5)

By Paul Weissmann on 14 January 2016

A new release of the print edition has been released after more than three years. It includes all the updates and changes from the online version between 2012 and 2016, and some new content. Main updates are PA-RISC system architecture, PA-RISC timeline and prices and wording and spelling corrections with several sections rewritten.

Download: Second Edition 2.5, (PDF, 1.3 MB, 375 pages, 2016)

PA-RISC Timeline added

By Paul Weissmann on 12 January 2016

A new page with timelines on PA-RISC systems has been added to the site, to detail some of the history and historic data of the systems covered here. The page includes content that had both been scattered throughout the site and collected here and there, and has now been combined into the PA-RISC Timeline page.

• Hardware Timeline (1982-2014): Release years of PA-RISC processors and computer systems as a rough guideline for PA-RISC history.
• Operating Systems Timeline (1988-2014): Release years of significant PA-RISC operating system, with the probable first release of a specific operating system version noted by year.
• Historic Prices: Collection of the historic prices of PA-RISC computers, around the date of introduction. These are indicative entry prices at system release for entry-level configurations which have been collected over the years from a variety of sources (press releases, articles, journals).

Archived pages added

By Paul Weissmann on 3 January 2016

Several pages with old content which were removed in 2008 have been added back to the Archive section:

• PA-RISC LED codes
• PA-RISC PDC Boot-ROM
• HP 9000 Memory Modules
• PA-RISC Expansion Cards

The content is still rather outdated and not actively maintained. It has been added back since many official documentation resources disappeared over the last few years.

PA-RISC chipset and system architecture pages unified

By Paul Weissmann on 3 January 2016

The pages on PA-RISC chipsets and PA-RISC system architecture have been combined. The system architecture content with high-level usage and design of the various chipsets has been added and restructured to the chipset page to remove redundancies. The PA-RISC chipset page now has both high-level system design and the associated chipsets together.

Most official documentation and manuals gone (404)

By Paul Weissmann on 28 December 2015

The majority of HP documentation on PA-RISC and HP 9000 systems disappeared from their official resources during the last two to three years. Most links to these return now a 404 as well and as such have been removed from the individual systems pages. The titles of the documents are still listed on the pages here but unless an official archive pops up they are gone. Those URLs are collected at the PA-RISC Documents list (404).

Update (31/12/2015): Some of the documentation has resurfaced at various new locations (corporate URL and business unit shuffling). Those links have been updated, but there is still a large amount of link churn and I expect that to continue.

Firmware updates for systems removed (HP ITRC)

By Paul Weissmann on 27 December 2015

The links to the firmware updates have been removed from the individual systems pages. Their archive at the HP ITRC pages had been gone for a while apparently -- returning 404s, as many former official HPPA resources do.

Various updates and clean-ups (CPU, architecture, chipsets)

By Paul Weissmann on 27 July 2014

The following pages have been updated, restructured and extended between 2012 and 2014:

• PA-RISC System Architecture (new): a new page has been added that describes the multiple PA-RISC platform designs from the early 1980s to mid-2000s, consolidating information from chipset, bus attachments, CPU attachment with new input. (This page has been merged into the PA-RISC Chipset page, January 2016)
• PA-RISC Operating systems: added Timeline (1988-2014) of PA-RISC Operating Systems.
• PA-RISC Processors: reintegrated Third party CPUs table.
• PA-RISC Architecture: Refocus on the PA-RISC ISA with descriptions on details of indidivual PA-RISC PA-1.x and PA-2.0 architectures.
• PA-RISC Chipsets: move content and align with new PA-RISC System Architecture page. (merged back in January 2016)
• Stylesheets for iPhone and iPad (and similar) devices: there are now two custom versions for these devices that should increase readibility and usability of the site.

New OpenPA Print Edition release (2.4)

By Paul Weissmann on 23 September 2012

A new release of the print edition has been released after three years. It includes all the updates and changes from the online version between 2009 and 2012, and some new content. Main updates are reworked chipset/bus/system design pages, HP-UX version 11 compatibility, and many small changes and corrections throughout.

Download: Second Edition 2.4, .pdf, 1.3 MB, 386 pages).

Chipset section extended (Stretch, zx1, others)

By Paul Weissmann on 18 December 2010

Entries on the Stretch chipset have been improved with more details and sections added for the Itanium/PA-RISC zx1 chipset and its various components.

All other chipset sections have been revised, extended and reordered, with an overview table providing a summary of the chipsets and support chips used in PA-RISC computers.

HP 9000/T600, T520, T500 & 890

By Paul Weissmann on 17 November 2010

The T-Class servers are large 32-bit PA-RISC mainframes from the mid-1990s, built with modular system cards that contain processors, memory or I/O devices.

The HP 9000/890 was an early iteration of the architecture, with the later T500/T600 being updated sucessors. After the 64-bit T600 the basic system design of the T-Class was discontinued in favor of the more flexible SuperDome systems.

Ten years OpenPA.net

By Paul Weissmann on 2 December 2009

December 2009 marks the 10th anniversary of OpenPA.net.

This site started in December 1999 (under a different title and URL) at a time when Google just started operating and Wikipedia didn't exist yet. It has been a long and rewarding time maintaining this resource on PA-RISC computing.

About 1.7 million visitors accessed this site since December 1999, according to a very rough estimate. Contributions and mails peaked in the early years between 1999-2002, probably owing to the fact that really no other information on PA-RISC was available then, which changed since.

This site was hosted at various locations on sometimes quite bizarre platforms, including a DECstation 5000/200 (25 MHz R3000 MIPS!), Alphastations (200 and 255), a HP 9000 712/100, and at some point even on a Motorola MVME187 system.

Thanks to all those who helped making this site happen, with providing infrastructure, services and contributing and correcting content!

CPU buses and attachments

By Paul Weissmann on 5 June 2009

HP used various CPU bus designs to attach the main processor to the main system bus with its I/O adapters and the memory. About five main connection strategies and buses were used, which were added as CPU attachment subsections to new or updated bus entries.

1. SMB bus attachment on early 32-bit PA-RISC 1.0 CPUs from the 1980s
2. PBus on 32-bit PA-RISC 1.1 PA-7000 and PA-7100
3. Direct attachments to the GSC bus on the low-cost PA-RISC 1.1 LC processors have
4. Runway bus attachments on PA-7200 and 64-bit PA-8000/PA-8200 processors
5. Runway+/Runway DDR , an advanced Runway variant, on PA-8500, PA-8600 and PA-8700
6. The last PA-RISC processors, the dual-core PA-8800 and PA-8900 use Itanium 2 processor buses

The PA-RISC processors sections have been updated with the bus information as well.

Memory and I/O controllers

By Paul Weissmann on 5 June 2009

Several forms of memory and I/O controllers (MIOCs) were employed on HP PA-RISC systems. The chipsets page has several updated and new sections:

• In early days (NS-1, NS-2 and PCX processors) a combination of support chips for the CPU was used — the SIU/SPI controllers being the main memory and bus controllers
• Later on, these chips were integrated into Viper, a single MIOC controller (PA-7000/PA-7100)
• On the LC processors the controller moved as integrated MIOC onto the CPU die (PA-7100LC/PA-7300LC)
• Newer Runway-based CPUs (PA-7200, PA-8000/PA-8200) split the MIOC again in different external chips, the U2/UTurn I/O controllers and MMC/SMC memory controllers
• Later 64-bit processors (PA-8500, PA-8600 and PA-8700) use a newer Runway+/Runway DDR variant and several I/O and memory controllers, such as Astro, Stretch or Cell
• The newest 64-bit processors (PA-8800, PA-8900 and Itaniums) use Itanium chipsets, including the HP zx1

Removal of outdated pages

7 January 2009

Several outdated and incomplete pages have been removed from OpenPA. This includes the listings for PA-RISC expansion cards, memory modules and explanations of the PDC Boot ROM and various LED error codes. As these pages had not been updated for many years, their content became less useful, and relevant only for older 32-bit systems. There are other sources with current and complete information on these topics (HP ITRC, HCLs, third-party part number listings, discussion boards). After consideration these pages were removed, as the utility of keeping known outdated pages is doubtful — even more so, if there are better resources elsewhere.

Mainframes: Convex SPP1000, SPP1200 & SPP1600

10 October 2008

The Convex Exemplar SPP1x00, introduced between 1994-1996, are scalable 32-bit mainframes, with either PA-7100 (SPP1000) or PA-7200 (SPP1200 and SPP1600) processors. They consist of three distinct system building concepts: the CD compact systems with up to 16 CPUs, the XA eXtended Architecture hypernodes with up to eight CPUs and the XA clusters, consisting of up to 16 linked XA hypernodes, with up to 128 CPUs.

HP started a collaboration with Convex in the mainframe sphere in the early 1990s with these PA-RISC based systems; Convex was later completely bought by HP (in the mid-1990s) and the SPP Exemplar computers integrated into HP’s own HP 9000 portfolio (first the joint-marketed S-Class and X-Class, later the HP V-Class).

The SPP 1x00 mainframes laid the foundation of the Exemplar crossbar architecture, with the 32-bit systems all using the same system design as the original SPP1000. The crossbar design was revised and improved in the 64-bit SPP2000 and later taken over into HP’s own V-Class system, basically only slighly faster SPP2000 systems. The first implementations of the Exemplar crossbar used rare Gallium arsenide gate arrays (GaAs) chips.

Mainframes: HP/Convex SPP2000 (S-Class/X-Class)

10 October 2008

The jointly marketed Exemplar SPP2000 (Convex)/S-Class and X-Class (HP) are the 64-bit Exemplar successors to the 32-bit based SPP1x00s from the mid-1990s. The SPP2000 are the direct predecessors of the HP 9000 V-Class systems (which were then sold only from HP after the complete acquisition of Convex. They feature a similar but slightly modified crossbar architecture, upgraded with 64-bit PA-8x00 processors. Single nodes can carry more processors (16), more RAM (32 GB) and have a different I/O system (PCI) than their predecessors; the clustering ability has been increased twofold — SPP2000 clusters (called X-Class by HP) can be built from up to 32 interconnected SPP2000 nodes (S-Classes at HP).

In contrast to the SPP1x00 line of Exemplars, the compact CD models — two closely coupled nodes and no SCI clustering attachments — were dropped with the SPP2000 and only the concept of a single node and multiple nodes as cluster retained. Also changed was the SCI (CTI) clustering topology — in contrast to the four unidirectional rings (2.4 GB/s overall) of the SPP1x00s, clustered SPP2000s form a torus with each of a single node’s eight memory controllers attaching to two SCI rings.

HP X-Terminals page contributed to Wikipedia

5 September 2008

The page on HP X-Terminals was contributed (i.e. donated) to Wikipedia as of September 5, 2008. The original content of this site can be freely distributed by Wikipedia. Somehow the X-Terminals page never really belonged to OpenPA — although the stations were often distributed along PA-RISC systems they were more or less just peripherals and not really in the focus of this site. Since the page was rarely updated a decision was made to contribute the whole content to Wikipedia, with the hope that it might be useful there. The page will be kept with a boilerplate/reference to Wikipedia for a while, however it is disconnected from the main site and will be removed in the next months.

3rd party PA-RISC systems: Hitachi, Mitsubishi and Oki

4 September 2008

Several other vendors sold PA-RISC workstations and servers in the mid-1990s, with Hitachi, Mitsubishi and Oki being active at that timeframe with various PA-RISC offerings on the Japanese market.

Hitachi sold both indigenous workstations (3050RX) and servers (3500) with PA-RISC processors, and relabeled systems from HP as OEM (9000V). The Hitachi page has been updated to include information on more 3050RX workstations, 3500 servers and the OEM systems. Mitsubishi and Oki in contrast only sold rebadged HP systems — Mitsubishi limited its PA-RISC line to the original HP 9000 Snakes (720, 730 and 750) sold in the early-1990s as MELCOM ME RISC series, while Oki offered almost the whole range of HP PA-RISC servers and workstations in the 1990s with the various OKITAC 9000 series.

Mainframes: HP 9000/V2200 and V2250 servers

5 August 2008

These first HP V-Class servers were closely based on the Convex SPP architecture and are more or less the direct successor to the Convex Exemplar SPP2000 computers. (HP first teamed with Convex starting in the early-1990s and bought Convex several years later and used and integrated their designs in their own product portfolio.) The SPP systems will be covered at a later date.

The V2250 and V2250 are large-scale scalable PA-RISC servers, with up to sixteen 64-bit PA-8200 processors in a single cabinet and up to 32  GB RAM.

The V-Class servers are based on a crossbar architecture — one central internal switching component links the various computing resources to each other by connecting the devices’ inputs to other devices’ output ports (in effect forming matrix connections). The V2200 and V2250 use HP’s own HyperPlane crossbar chipset, consisting of four central crossbar ASICs and various other chipset components to attach memory, processors and I/O. In contrast to their V2500 and V2600 successors the V22x0s could not be clustered to form a single large system.

Mainframes: HP 9000/V2500 and V2600 servers

5 August 2008

The V2500 and V2600 are the second generation scalable PA-RISC V-Class servers built upon the Convex Exemplar architecture. They can hold up to 32 64-bit PA-RISC processors in a single cabinet. As their Convex SPP predecessors, and contrary to the V22x0s, multiple systems (up to four) can be interconnected via so-called CTI links (independent rings — SCI interconnects). The resulting combined system can have up to 128 CPUs and presents itself to the operating system as a single computer. Architecturally, the interconnected V2500s/V2500 clusters are ccNUMA computers, that is cache-coherent Non-Uniform Memory Access.

As their V2200/V2250 brethren, the V2500/V2600 are very closely based on the Convex Examplar architecture (SPP2000 is the direct predecessor) with a central HyperPlane crossbar chipset which links together processors, I/O and memory; in contrast to the V22x0, these V2500/V2600 also implement to clustering technology which links up to four systems together (via attachment between the crossbars — implemented with SCI links on their memory controllers).

Second Edition of the OpenPA Print Edition

31 May 2008

The Second Edition of the OpenPA Print Edition was released with much new content additions and typographic improvements. In all about 70 new pages have been added since the First Edition, and almost all pages have been updated and revised. Additionally, many changes and improvements to the formatting/conversion process have been made. The Second Edition 2.0 is available as PDF, for more details see the Print Version page linked to above or download the PDF directly (.pdf, 1.4 MB, 355 pages).

HP Itanium (IA64) servers and workstations added

15 April 2008

Several pages for systems with the HP PA-RISC successor — the HP/Intel Itanium (IA64) architecture — have been added. These include all three Itanium workstations produced by HP, the HP i2000, HP zx2000 and HP zx6000. Also covered are a range of the Integrity rx rack-mount servers: HP rx1600 and rx1620, HP rx2600 and rx2620, HP rx4610, HP rx4640 and HP rx5670. Descriptions of the remaining rx Integrity servers will be added soon.

Much improved Research PA-RISC Operating Systems page

31 March 2008

The page detailing the various research and development projects of operating system ports to the PA-RISC platform has been reworked and filled with much more content. The Mach 4/Lites entry (The Utah PA-RISC Code Snapshot) has been extended with content from the original project page at the University if Utah; the HPBSD and Chorus entries have been corrected and reworked; and new sections on various other porting efforts from the early 1990s have been added — HP Tut, HP OSF/1, Mach 3/UX and MK-PA (OSF Mach 3/OSF/1).

HP N4000 (rp7400) servers page

12 March 2008

The rp7400 were the original version of the N4000 line of servers — the newer rp7405 and rp7410 servers were also labeled as N4000 and feature a similar set of I/O options and expandability in basically the same chassis. However the original N4000, the rp7400 described here, is based around a different system architecture than their sucessors — the Stretch chipset, also used in L1500 and L3000 (rp5430/rp5470) servers.

Cell (Superdome) and Stretch chipset sections added

12 March 2008

The newer PA-RISC based servers, including the rp5430/rp5450 (L1500/L3000), rp7400 (N4000) and rp7405/rp7410 (N4000), are based around rather complicated chipset setups — the rp7405/rp7410 N4000s are build around the cell-based Core Electronics Complex (CEC) taken from the Superdome supercomputers. The other two smaller systems are centered around a quasi-IA64 system architecture — Stretch which describes a chipset build around IA64/Merced system buses, to which memory, PA-RISC processors and I/O subsystems attach via various chipset components.

HP N4000 (rp7405/rp7410) servers page

26 February 2008

The rp7405/rp7410 N4000 servers are up to 8-way multiprocessing servers and the smallest HP systems which can be partitioned into (two) logical servers (nPartitions). Based upon the same 10U rack-mountable chassis as their rp7400/N4000 brethren, the newer rp7405 and rp7410 are build around a completely overhauled system and I/O architecture. The Core Electronic Complex is a modified version of the Superdome’s cell-based system architecture, limited to two cells. These newer N4000s feature an very large amount of system and I/O bandwidth: 16 GB/s CPU, 8 GB/s memory, 8 GB/s cell-to-cell and 8.5 GB/s I/O bandwidth (all maximum aggregate values).

HP L1500 & L3000 (rp5430/rp5470) servers page

26 February 2008

The second incarnation of the L-Class servers are, similar to their direct predecessors L1000 and L2000, 7U rack-mountable servers with either 1-2 or 1-4 processors, 8 GB or 16 GB RAM and a large set of I/O options and expandability. The internal system architecture of the L1500 and L3000 is different however — the central parts of the processor/memory and I/O system were modified versions of the central complex of the Superdome line of computers. Supported processor include 64-bit CPUs from PA-8500 (L1500-only) up to PA-8900 and possibly Itanium 2.

HP 9000 rp3410 & rp3440 servers page

11 February 2008

The rp3400 series are the defacto successors to the rack-mountable A-Class systems — they use 2U of space in a 19″ rack. The single-CPU rp3410 uses 64-bit PA-8800 Mako processors while the dual-CPU rp3440 can use either PA-8800 or PA-8900 (the last PA-RISC CPU) processors. Both are based around the same system architecture, which is built around HP’s zx1 Itanium 2 chipset, making upgrades to IA64 processors possible.

HP 9000 rp4410 & rp4440 servers page

11 February 2008

The rp4400 series are the bigger brothers of the rack-mountable rp3400 — the dual-processor rp4410 and quad-processor rp4400 are 4U 19″ systems also build around the zx1 Itanium 2 chipset, with minor changes to the rp3400’s architecture. The rp4400s can use large amounts of RAM (128 GB) and a rp4440 can offer up to eight PA-8900 cores and eight I/O channels (4.0 GB/s) in a single system.

Early PA-RISC processors: TS-1, NS-1, NS-2 and CMOS26B

14 January 2008

As fallout from the improved early PA-RISC HP 9000/800 server article much information on the first PA-RISC processors was compiled and added to the PA-RISC processors page. These CPUs from the mid-1980s implemented the original PA-RISC 1.0 architecture and were fabricated in TTL, NMOS-III and later CMOS. They were all multi-chip implementations with various external support chips for the system and I/O interfaces.

Information on these CPUs proved to be almost non-existant — most was gleaned from old manuals and brochures on the PA-RISC architecture and 9000/800 systems from hpmuseum.net and cross-checked with paper manuals on some older systems. There was apparently never a complete picture on these old CPUs, even their names differ in the various sources.

Updated and much improved information on 1980s PA-RISC servers

14 January 2008

The page on the early PA-RISC history (mid-1980s to early-1990s) has been completely rewritten and greatly expanded, with more details and many corrections. First PA-RISC computers were introduced as HP 9000/800 server systems — computers like the 840, 825, 835, 850, 855, 860 and 870 etc. — all based on PA-RISC 1.0 processor implementations.

Details and specifications of these systems is very sparsely available online; what was found was taken from scanned/OCRed articles from old HP publications and sales brochures. There are still some details which are not completely clear, however.

Other PA-RISC CPUs: Winbond and Oki Embedded Processors

02 January 2008

In the mid- to late-1990s Winbond Electronics designed and sold a range of 32-bit PA-RISC embedded processors, targeted at set-top boxes and Internet Appliances. The chips of the W89K and W90K lines were based on a PA-RISC 1.1 Level 0 implementation which features no MMU/virtual adressing. The W89K and W90K feature a pin-out similar to that of Intel 80486DX which should faciliate an easy integration of these chips into existing embedded motherboard designs.

Oki Semiconductors introduced in the same timeframe apparently also an embedded PA-RISC controller, the OP32/50N. Not much information could be found on this chip.

New Release (1.1) of the OpenPA Print Edition

30 November 2007

The OpenPA Print Edition, available in two versions as PDF, was updated with new content and corrections from about Summer 2006 till Fall 2007. Additionally, various typographic and formatting/conversion changes have been made. The new release is available in two versions: 1. DIN A4-sized format for printing on single-sided sheets of paper (A4 is similar to U.S. Legal size) and 2. DIN A5-sized version for printing on smaller, double-sided sheets useful for binding as book.

OpenBSD support for four-digit 64-bit systems

31 August 2007

Support for the newer 64-bit PA-8x00 systems has been recently added to OpenBSD/hppa. This includes popular workstations such as B1000, B2x00, C3x00, J5000/J7000, J6x00 and various newer 64-bit D- and K-class servers.

PA-RISC History — Early PA Days

23 January 2007

A second attempt at a page detailing the roots and origins of PA-RISC has been made, starting with a subsection on the (very) early days of PA-RISC processors and systems at the time of the original PA 1.0 architecture, including lesser known CPUs as TS, NS/PN and PCX.

The original plan called for a complete picture of the PA-RISC lifetime and the various aspects of the architecture and systems design. Due to limited time, however, the page was never completed and thus the decision was made to publish single subsections over the time.

More subsections will be added if time permits — including words on PCX-based and later systems, the CPUs and architecture and, in the near future, a more detailed discussion of the (NS-1–based) 825, 835 & 845 systems.

OpenPA PDF Version

31 July 2006

A first edition of a complete, offline viewable version of the OpenPA Project is available as a PDF book. Several attempts had been made in the past but a new effort started in Spring 2006 and utilizing XSLT and TeX resulted in the current first edition, now downloadable.

C8000 workstation

18 Apr 2006

The C8000 is probably the last PA-RISC powered HP-UX workstation, featuring one or two of the dual core PA-8800 or PA-8900 processors. System design is apparently quite close to previous Itanium offerings from HP, as the workstation uses the Itanium 2 system/memory bus and HP’s zx1 chipset.

PA-8900 processor

18 Apr 2006

The PA-8900 is more or less only a slightly improved PA-8800 (Mako) and will supposedly be the last processor of HP’s PA-RISC family. Much of the very scarce available documentation seems to suggest that the PA-8900 can be fit in most of the newer rp-series servers. Basic design and features are very close to the PA-8800.

PA-8800 (Mako) processor

18 Apr 2006

The Mako is the integration of two PA-8700+ processor cores onto a single die in combination with a very large off-die 32 MB L2 cache, placed on the CPU module. The PA-8800 makes use of the Itanium 2 system/memory bus and many systems supporting the Mako apparently can be upgraded to Itanium-family CPUs. As all processors after the original 64-bit PA-8000, Mako does not introduce any significant architectural enhancements, main extensions are based largely around better process technologies and larger/faster cache subsystems.

Improved PA-RISC Linux

29 Dec 2005

The page on the Linux port to PA-RISC did not really contain much useful information, so it finally has been rewritten and the content on supported hardware, history and development greatly extended.

Multimedia Acceleration eXtensions (MAX-1 and MAX-2)

13 Dec 2005

HP was the first to introduce Single Instruction Multiple Data (SIMD) instructions tailored for the accelation of multimedia applications on a general purpose processor. These instructions operated on so-called subword data and were introduced as MAX-1 on the PA-7100LC processor and subsequently enhanced and featured as MAX-2 on all 64-bit PA-8x00 processors.

Much improved support for print media

02 Oct 2005

The CSS definitions for print media were greatly reworked to produce a much smoother and more readable output when printed out. A new feature is that external links in the printed out pages are now annoted and listed at the bottom of the printout with the complete URL.

CSS Mop-Up

07 Dec 2004

The existing stylesheet for screen media was greatly reworked to increase the usability of the site. Additionally, there are now separate stylesheets for handheld computers and print media which take in account the specifics of these media types.

Architecture of the HP FOCUS

29 Nov 2004

FOCUS was one of HP’s first tries to design and implement a CPU architecture and was used in the HP 9000/500 series. An more in-depth look, contributed by Frank McConnell, has been added to the HP 9000/520 page.

Shortcuts to the computers pages

13 Oct 2004

Through the use of shortcuts the model pages of the various PA-RISC computers can be directly accessed. For this a modified URL like eg. https://www.openpa.net/712 (for the HP 9000/712 page) has to be used.