Some PA-8500, PA-8600
and PA-8700 systems use a
rope-based architecture with Astro as main system controller and IOMMU, and
separate Runway+/Runway DDR buses with I/O devices controlled by Elroy
- Runway+/Runway DDR is the main processor and memory bus: one to four CPUs attach to Runway with 64-bit, parity-protected.
- Astro is the main memory and I/O controller which attaches to Runway: memory attaches to Astro with a peak data rate of about 2.0 GB/s at 125 MHz, and up to eight I/O links (ropes) with each 250 MB/s attach to Astro.
- Elroy I/O adapters attach PCI bridges via the I/O ropes to Astro: One or two ropes per Elroy PCI bridge, then PCI slots or devices attach to Elroy bridges
- PCI buses attach to the multiple Elroy bridges, in 33 or 66 MHz, 32 or 64-bit variants. I/O devices, adapters and slots attach to PCI
- Astro supports 120/125 MHz SDRAMs for a maximum supported memory of 40 GB
- Pluto is the successor of Astro for Itanium-2 processors and buses; it works very similar.
- 16-entry fully associative I/O TLB
- 16-entry fully associative coherent I/O buffer cache
Elroy is a PCI bus bridge that attaches one PCI bus to one or more I/O ropes. Elroy was often used with the Astro memory and I/O controller.
- Peak bandwidth of up to 500 MB/s
- Multiple Elroys can be used in a single system
- Support for Turbo and Twin Turbo slots — attached via one or two links respectively
- Support for PCI 2.1, 1X, 2X and 4X bus
- PCI data width of 32 or 64 bit
- PCI clock of 33 or 66 MHz
- A400 (rp2400, rp2430), rp2405, A500 (rp2450, rp2470)
- B1000, B2000, B2600
- C3000, C3600, C3650, C3700, C3750
- J5000, J5600, J6000, J6700, J7000, J7600
- L1000 (rp5400), L2000 (rp5450), L1500 (rp5430), L3000 (rp5470)
- Elroy: N4000 (rp7400), N4000 (rp7405, rp7410),
External Reference Specification Introduction
Astro External Reference Specification Error Handling
Astro External Reference Specification R2I Operations
Astro External Reference Specification Register Map
Astro External Reference Specification Runway Interface
Astro External Reference Specification Memory Map
Hewlett-Packard Company (February 2000, Revision 1.2)
- Elroy ERS (External Reference Specification) — Ropes to PCI Bridge Chip Hewlett-Packard Company (January 2000, Revision A (1.4))