LASI PA-RISC Chipset

HP PA-RISC PA-7100LC and PA-7300LC 32-bit systems use HP LASI, a highly integrated HP chipset, which combines many functions and I/O on a single chip, together with their on-CPU MIOC memory controller for a very integrated system design.

HP LASI was primarily designed for cost-reduction while still providing most I/O functions. It was used as the main controller in most PA-7100LC and PA-7300LC systems, while later 64-bit PA-8x00 systems used LASI for complementary I/O functions.

Primary cost reductions were achieved by integrating major I/O subsystems into a single chip, like LAN and SCSI from Intel and NCR, respectively. Some I/O systems were designed specifically for LASI. Furthermore, for integration the PA-7100LC and PA-7300LC CPUs integrate the external memory and I/O controller MIOC onto the processor with memory and cache directly attaching to it.

Details

GSC bus interface
Integrated Intel i82C596CA 10 Mbit Ethernet
Integrated NCR 53C710 Fast-Narrow SE SCSI-2
NS16550A compatible RS232
WD16C522 compatible parallel
PS/2 controllers
Harmony CD-quality 16-bit sound
PS/2 style keyboard and mouse devices
8-bit bus to connect flash EPROMs and FDD
Bus arbitration, Interrupt controller, Real-Time clock, PLL generator for the whole I/O subsystem
13.2×12.0 mm² die, 520,000 FETs, 0.8µ, CMOS26B in 240-pin MQUAD, 3W at 40 MHz

System design

A typical system design with one of the 32-bit LC Low Cost processors PA-7100LC and PA-7300LC with GSC main system bus would look like this:

MIOC, main memory and I/O controller, directly integrated on the CPU
- Execution units and internal caches attach on-chip to the MIOC
- External cache and memory attach to MIOC
GSC, system main bus, attaches to MIOC and I/O controllers
- Attaches via 32-bit
- PA-7300LC systems use extended GSC+
I/O adapters attach to GSC
- LASI chipset
- Some video adapters directly attach to GSC
- I/O slots extend GSC
- Bus adapters, including EISA, VME and PCI, attach to GSC

 PA-7100LC GSC bus attachment               PA-7300LC GSC bus attachment
 ============================               ============================

              _______                             ________
           | Cache |                           |L2 Cache|_____ 128-bit
           |_______|                           |________|     |
        64-bit |                          128-bit  |          |
            ___|___  64b ||||                  ___|___ 128b  |_||||
           |  CPU  |_____|||| Memory           |  CPU  |________|||| Memory
           |_______|     ||||                  |_______|        ||||
               ||                                 ||
               || GSC 32-bit                      ||  GSC 32-bit
     ========================             =================================
   __|_       _|_   |   | | |             __|_    _|_   _|_        |  | | |
  |LASI|     |VGA|  |   | | |            |LASI|  |VGA| |PCI|__     |  slots
  |____|     |___|  |  I/O slots         |____|  |___| |___|  |    |
   ||||             |                     ||||          |||   |    |
I/O devices   foreign bus                 I/O          slots  |    |
controllers   adapters (VME/EISA)                          devices |
                                                                   |
                                                                foreign bus
                                                         adapters (VME/EISA)

GSC bus attachments for LASI

Wax

HP Wax is a secondary I/O controller complimentary to the HP LASI chipset. Wax implements various secondary I/O functions and acts as a I/O bus to GSC adapter for different external buses such as EISA, HP-HIL and HP-IB. Most systems use Wax to complement LASI with other required I/O functions that were previously implented in various external I/O ASICs. Was is implemented in the same process and package as LASI.

GSC bus interface with GSC+ features
EISA bus converter, interfaces to external EISA controller: TI TACT84500
Serial interface — NS16550A compatible RS232
HP-HIL interface, compatible to previously separate HP HIL chip used in older workstations
HPIB interface for instrumentation devices, needs three external chips
Interrupt control, Timers
0.8µ CMOS26B packaged in 240-pin MQUAD

Used in

HP LASI was primarily designed for cost-reduction while still providing all required I/O functions in a single chip. It was used in most PA-7100LC and PA-7300LC systems.

HP 9000 712, 715, 725, 743i, 745, 744, 748i workstations
HP 9000 A180, A180C servers
HP Visualize B132L, B132L+, B160L, B180L+
C100, C110, C132L, C160L, C160, C180, C200, C240, C360 workstations
HP 9000 D-Class servers
HP 9000 E25, E35, E45, E55 servers
HP Visualize J200, J210, J210XC, J280, J282, J2240 workstations
HP 9000 K-Class servers
RDI PrecisionBook 132, 160, 180 laptops
HP 9000 R380, R390 servers
SAIC Galaxy 1100 portables
HP Agilent 16600A, 16700A, 16700B, 16702A and 16702B series logic analyzers

Documentation

712 I/O Subsystem ERS (External Reference Specification) — LASI ERS Hewlett-Packard Company (February 1993, Revision 1.1) parisc linux
An I/O System on a Chip (LASI) (PDF, HP Journal 4/95) archive.org
External Reference Specification (ERS) for the Wax I/O ASIC Hewlett-Packard Company (May 1993, version 1.0 redacted) parisc linux