PA-RISC information - since 1999

PA-RISC Chipsets

U2 and UTurn chipset

PA-RISC computers based on 32-bit and 64-bit processors with a Runway processor interface used a U2 or UTurn system design and chipsets. U2 and UTurn are the I/O adapters and MMC/SMC the memory controllers that each attach other subsystems to the main Runway processor bus. Also called IOAs, UTurn and U2 attach the GSC main system bus with devices and I/O to the Runway to the processors. This setup allowed HP to use a standard frontend with UTurn in different system designs with different backends to support memory or I/O technologies.

U2 is the variant for PA-7200 systems while all later systems with PA-8000 and PA-8200 processors use the UTurn follow-on.

A typical system design and bus setup would look the following:

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Most systems with a PA-7200, PA-8000 or PA-8200 processor use a combination of the MMC and SMC memory controllers to attach the main system memory to the Runway processor bus. The I/O is controlled by the U2/UTurn I/O adapters on the same Runway bus.

Used in

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Dino is the GSC to PCI bridge found in many older PCI PA-RISC workstations. The GSC and PCI buses do not need to be synchronized, simplifying the system design. Dino also implements a small set of I/O functions. Cujo is a Dino bridge for 64-bit PCI.

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