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PA-RISC information - since 1999

PA-RISC Processors

Other PA-RISC processors

Several other third-party processor designers implemented PA-RISC processors and solutions both for workstation and server use (Hitachi) but also for embedded systems of the 1990s like set-top boxes, TVs and for device controllers such as printers.

Other PA-RISC processors overview
CPU ISA Release Clock Cache Bus Super
scalar
Units Controllers
on-chip
Hitachi
PA/50L
PA 1.1
32-bit
1993 33MHz 12KB ? 1-way 1 Integer
1 Floating Point
Hitachi
PA/50M
PA 1.1
32-bit
1993 60MHz 12KB ? 1-way 1 Integer
1 Floating Point
Hitachi
HARP-1
PA 1.1
32-bit
1994 150MHz 24KB
1MB L2
? 2-way 2 Integer
1 Floating Point
(Vector)
Winbond W89K PA 1.1
32-bit
1994 33/66MHz 4KB Intel 486 1-way 1 Integer none?
Winbond W90210
W90215
PA 1.1
32-bit
1997 33/66MHz 12KB Intel 486 1-way 1 Integer
MAX-1
DRAM
DMA
PCI
I/O
Winbond W90220
W90221
PA 1.1
32-bit
1999 150MHz 8KB Intel 486 1-way 1 Integer
1 MAC(DSP)
MAX-1
DRAM
DMA
PCI
IDE
I/O
VGA (W90221)
TV (W90221)
Oki OP32 PA 1.1
32-bit
1994 33MHz ? ? 1-way 1 Integer DRAM
DMA
Amiga Hombre PA 1.1
32-bit
1995 125MHz ? 64-bit 1-way 1 Integer Memory
DMA
PCI
I/O
VGA
audio
Copper
Blitter

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Hitachi PA/50L and PA/50M processors

The Hitachi PA/50 was a family of PA-RISC 1.1 processors designed and manufactured by Hitachi, released in 1993. Two designs were developed: M, with around 100 MIPS, and L, low-cost, with around 55 MIPS. They were used as personal workstation processors and high-end embedded controllers and integrated a set of features previously not available at that time in other PA-RISC processors like on-chip caches, data-prefetching, a power-saving mode and SDRAM support.

Used in

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Hitachi HARP-1 processor

The Hitachi HARP-1 is a PA-RISC version 1.1 compatible CPU from Hitachi, introduced in June 1994. It is apparently a larger and faster version of the PA/50 processor, however . not much information is available on either processor.

The HARP-1E variant supposedly includes (pseudo) vector processing modifications/add-ons and was used in Hitachi vector/supercomputers. It seems the L1 cache was increased to 16 KB/16 KB instruction/data.

Used in

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Winbond W89K processor

The Winbond W89K is an embedded 32-bit PA-RISC controller chip, pin-compatible with the then-popular Intel 80486DX, introduced in Spring 1994. It could be used as a drop-in replacement in mid-1990s PCs together with Winbond BIOS replacement chips. Rationale was to allow hardware developers utilize existing 486DX mainboards and components for a shorter product development process. The W89K is a level 0 PA-RISC 1.1 implementation: a 32-bit PA-RISC processor without virtual addressing.

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Winbond W90210/215 processor

Shortly after the W89K embedded controllers Winbond introduced more sophisticated PA-RISC processors in Fall 1997 with the W90K line of embedded controllers. The W90210F still was 32-bit PA-RISC 1.1 but integrated many external I/O components on the chip — DRAM and DMA controllers, a PCI bridge and various I/O ports. As its predecessor, the W90210F was a level 0 PA-RISC 1.1 implementation without virtual addressing. It was apparently used in various Internet appliances: set-top boxes, TV sets, DVD players, PDAs, VoIP devices, and for industrial automation. The W90215 is identical to the W90210 but did not include license rights for the embedded operating system and was thus cheaper.

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Winbond W90220 and W90221 processors

The W90220F is, as its predecessor W90210, a 32-bit PA-RISC 1.1 design without MMU but integrated many external I/O components on the chip — DRAM and DMA controllers, PCI bridge, IDE channels, I/O ports and, on the W90221, a graphics/TV chip. Released in Spring 1999, it had the same target systems of set-top boxes and internet appliances. The sucessor W90221 is apparently similar, with higher clock speed, integrated (S)VGA and TV controller

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Oki OP32 processor

Oki Semiconductor OP32/50N was introduced in 1994 as an embedded controller, based on a 32-bit PA-RISC design with integrated DRAM and DMA controllers. The chip was targeted at laser printers, Fax machines, X-Terminals and the Telecom and Automotive markets.

Amiga Hombre processor

Between 1992 and 1994, Commodore designed a new graphics chipset to power Amiga computers based on HP PA-RISC, called Hombre. The development effort apparently included HP and was based on a PA-RISC core to be available for 1995 production for a CD-based Game Machine, cable TV, MPEG and as a PCI-based graphics accelerator. The Hombre processor design was to be implemented in two chips:

The CPU core was 32-bit PA-RISC 1.1, Integer-only with a 5-stage pipeline and 64-bit datapath

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References

  1. Chronology of Workstation Computers (1993) Ken Polsson (November 2007. Accessed November 2007)
  2. PROgress (PA-RISC) Newsletter - comp.sys.hp Candace Doyle (October 1993: Precision Risc Organization. Accessed December 2007)
  3. Basic Concept of Cooperative Timing-driven Design Automation Technology for High-speed RISC Processor HARP-1 (PDF) Hidekazu Terai et al (October 1999: Hitachi Ltd. Accessed January 2008)
  4. PROgress (PA-RISC) Newsletter - comp.sys.hp, Candace Doyle (October 1993: Precision Risc Organization. Accessed December 2007)
  5. Winbond, Varian sign deal for thin-film IC process, Terho Uimonen (April 1994: Electronic News. Accessed January 2008 at findarticles.com)
  6. PA-RISC in a PC box (was: Re: HP's vision of a low-end 3000) comp.sys.hp.mpe, Stan Sieler (Februar 1996. Accessed December 2007)
  7. HITACHI CLAIMS TO HAVE THE INDUSTRY’s CHEAPEST UNIX WORKSTATION, USING PRECISION ARCHITECTURE..., CBR Online Archive, 28 Oct 1993
  8. October 1993 PROgress Newsletter, USENET post, Google Archive, 11/01/1993
  9. A 120- MHz BiCMOS Superscalar RISC Processor, Shigeya Tanaka et al (IEEE Journal of Solid-State Circuits, vol. 29, no. 4, April 1994)
  10. W90210F PA-RISC Embedded Controller (.pdf) sWinbond Electronics Corp. (October 1997. Accessed January 2008)
  11. W90220F PA-RISC Embedded Controller (.pdf) Winbond Electronics Corp. (March 1999. Accessed January 2008)
  12. Hombre - The last Commodore custom chipset, Amiga History Guide
  13. CBMs Plans for the RISC-Chipset, Dave Haynie 1995

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