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PA-RISC information - since 1999

PA-RISC Processors

PA-7100LC (PCX-L) processor

Overview

The PA-7100LC is a 32-bit PA-RISC processor from HP introduced in 1994, designed as a single-chip solution for low-cost systems with the performance of comparable workstations and servers. The CPU core is close to the earlier PA-7100 processor and was integrated with FPU, MIOC, first-level cache, onto a single chip with direct GSC main bus attachment.

HP added support for bi-endian byte ordering for the first time to PA-RISC with the PA-7100LC, ostensibly for supporting a wider range of (non-Unix) operating systems. The successor of the PA-7100LC is the similar and improved PA-7300LC processor, released two years later.

Details

Only one of the two integer ALUs is able to handle loads, stores and shifts, these operations can only be paired with simple math operations, like integer addition or multiplication. Both units can handle branch operations.

Used in

References

  1. PA7100LC ERS (External Reference Specification) (.pdf) Hewlett-Packard Company (1999)
  2. The PA 7100LC Microprocessor: A Case Study of IC Design Decisions in a Competitive Environment Mick Bass et al (April 1995: Hewlett-Packard Journal. Accessed May 2009)
  3. Design methodologies for the PA 7100LC microprocessor (.pdf) Mick Bass et al (April 1995: Hewlett-Packard Journal. Accessed May 2009)

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