PA-RISC Processors

PA-8600 (PCX-W+)

Overview

The PA-8600 is basically a modified PA-8500 in a new manufacturing process to achieve higher clock speeds. Released in January 2000, the PA-8600 was a PA-RISC 2.0 64-bit processor, and used as upgrade in many HP 9000 servers and workstations.

Details

PA-RISC version 2.0, 64-bit architecture, multi-processor capable, 4-way superscalar
Ten functional units: 2 integer ALUs, 2 shift/merge units, 2 complete load/store pipelines, 2 Floating Point multiply/accumulate units, 2 Floating Point divide/square root units
IRB: 56-entry instruction queue/reorder buffer
TLB: 160-entry fully-associative dual-ported
BTAC: 32-entry Branch Target Address Cache; BHT: 2048-entry Branch History Table
Cache L1 0.5 MB I and 1 MB D on-chip, each 4-way set associative
Memory: up to 1 TB memory supported with 40-bit physical addresses
Memory and I/O controllers are external
Bi-endian support
MAX-2 multimedia extensions subword arithmetic for multimedia applications
Runway+ system bus, 125 MHz, 64-bit, DDR, about 2 GB/s peak bandwidth
Up to 550 MHz, clock speed with 2.0 V core voltage
21.3×22.0 mm² die, 140,000,000 FETs, 0.25µ (micron), 5-layer metal CMOS packaged in a 544-pin LGA package

Used in

HP 9000 A400-5X (rp2400), A500-5X (rp2450) servers
HP 9000 B2000 (some), B2600 workstations
HP 9000 C3600 workstations
HP 9000 J5600, J6000, J7600 workstations
HP 9000 L1000-5X (rp5400), L2000-5X (rp5450), L1500-5X (rp5430), L3000-5X (rp5470)
HP 9000 N4000-5X (rp7400) servers
HP 9000 V2600 mainframes
HP 9000 Superdome mainframes
NEC NX7000/L1000, NX7000/L2000, NX7000/L3000 servers
Stratus Continuum 439, 449, 651-2, 652-2, 1251-2, 1252-2 mainframes

↑ up