PA-RISC information - since 1999

PA-8800 PA-RISC Processor

Overview

The dual-core PA-8800 Mako processor, introduced in 2004, is a PA-RISC 2.0 64-bit processor from HP that integrated two seperate PA-8700 cores on a single die with very large off-die L2 caches. The clock speed was only increased slightly from 875 MHz on PA-8700 to 1 GHz on PA-8800, while the processor bus interface was redesigned to use the fast Itanium 2 bus.

Mako was supposed to breathe fresh life in the PA-RISC line, though it had strong internal competition from Itanium, a VLIW development from HP and Intel. PA-8800 was (almost) end of the line for PA-RISC and thus was not marketed much. Most systems with PA-8800 used the HP zx1 chipset and could be upgraded to Itanium 2 IA64 processors.

PA-8800 was at the time of release one of the largest commercial processor chips ever, followed by the mysterious PA-8900 processor in 2005.

Processor details

Functional units

PA-8800 is a dual-core 64-bit PA-RISC processor that implements version 2.0 of PA-RISC architecture. It is multi-processor capable (SMP) and four-way superscalar, so it can decode, dispatch and execute multiple instructions per cycle.

There are two seperate cores with each ten integrated functional units in the PA-8800: two Integer ALUs, two shift/merge units, two complete load/store pipelines, Floating Point multiply/accumulate units (FPMAC), two Floating Point divide/square root units plus plus MAX-2 multimedia extensions (subword arithmetic) for multimedia applications.

The Instruction Reorder Buffer (IRB) has an 56-entry instruction queue/reorder buffer per core for instruction scheduling in hardware by the CPU.

The Translation Lookaside Buffer (TLB) with 240 entries, fully associative and dual-ported, translates virtual-to-physical memory addresses, the Branch Target Address Cache (BTAC) has 32 entries, the Branch History Table (BHT) 2048 entries – all per core.

Cache and memory

PA-8800 have on-chip L1 caches and very large off-chip L2 caches. Main L1 cache is 0.75 MB instruction and 0.75 MB data on-chip, per core, each 4-way set associative. L2 cache is 32 MB off-chip with four 8 MB DDR-ESRAM chips, shared between the cores, L2 controller is on-chip.

Memory and I/O controller (MIOC) for accessing the memory and main buses is off-chip. Main memory is supported up to 16 TB with 44-bit physical addresses.

The PA-8800 is bi-endian with support for little-endian and big-endian ordering.

Speed and buses

PA-8800 processors were fabbed with up to 1 GHz clock speed at 1.5 V core voltage. They attach to Itanium processor bus, 128-bit, 200 MHz, 6.4 GB/s bandwidth.

Cache speed to L2 is 300 MHz clock with 2.7 GB/s data rate per ESRAM (four).

Physical

Fabricated by IBM, PA-8800 have a 23.6×15.5 mm² die with 300,000,000 transistors (FETs) in a 0.13µ 8-layer Silicon-on-Insulator CMOS process. IBM used a similar process for its IBM POWER4 processors.

Performance

HP PA-8800 PA-RISC were (almost) last of the line of 64-bit PA-RISC processors, the dual-core integration the last development step to increase the performance of the original PA-8000 core. Few formal SPEC benchmark scores exist for PA-8800.

PA-8800 was a very fast RISC processor when released in 2004 and much faster at the same clockspeed than Alpha 21364 (2001), IBM POWER4+ (2003), Itanium McKinley (2002). It was in the same ballpark as AMD Athlon XP (2002), Intel Xeon DP (2003) and Pentium 4 Prescott (2003) at much higher (more than double) the frequencies.

Used in

PA-8800 processors were used in the last PA-RISC-powered HP Unix workstations and servers in the mid-2000s, when HP planned Itanium processors for high-end models.

Documentation

  1. HP’s Mako Processor (PDF, 1.4 MB), David J. C. Johnson (2001: Microprocessor Forum).
  2. HP brings new chips to servers , CNet 2006
  3. HP readying dual-core PA-8800 As Itanium 2 looms, The Register, 2002
  4. HP explores 64-bit x86, unveils PA-8800 servers, EE Times, 2004
  5. HP delivers the last of the PA-RISC processors, Computer Business Review 2005
  6. Cache and TLB on PA8800, PA-RISC Linux, 2024
  7. Hewlett-Packard PA-RISC 8800, Overview of Recent Supercomputers, netlib.org, 2004
  8. HP 9000 server family PA-8800, HP 2004

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