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PA-RISC information - since 1999

PA-RISC Processors

The PA-RISC platform is based on HP RISC processors developed by HP in the 1980s and used in HP computers from the 1980s to the 2000s. There are three versions of PA-RISC architecture:

  1. PA-RISC 1.0 32-bit, implemented in early 1980s processors and used in the first PA-RISC servers: NS-1, NS-2 and PCX, plus the TTL TS-1 and maybe others.
  2. PA-RISC 1.1 32-bit, used in the popular HP 9000 servers and workstations from the late-1980s to 90s: PA-7000 and PA-7100 and integrated PA-7100LC and PA-7300LC.
  3. PA-RISC 2.0 64-bit redesign, used many 1990s/2000s HP computers: PA-8000/PA-8200 and the updated PA-8500, PA-8600 and PA-8700 with large on-chip caches. PA-8800 and PA-8900 are dual-core, with the final PA-9000 never implemented.

The following PA-RISC processors have been developed and used by HP since 1986.

HP PA-RISC processors overview
CPU ISA Release Clock
max
Cache
max
Bus Super
scalar
SMP Units
FOCUS FOCUS
32-bit
1982 18 MHz 16 KB Custom yes 1 Integer
1 external FPU
TS-1 PA 1.0
32-bit
1986 8 MHz 128 KB Custom 1-way 1 Integer
1 external FPU
NS-1 PA 1.0
32-bit
1987 30 MHz 128 KB S MB 1-way 1 Integer
1 external FPU
PRISM
(Apollo)
PRISM
32-bit
1988 18 MHz 196 KB X-bus 1-way Yes 1 Integer
1 Floating Point
NS-2 PA 1.0
32-bit
1989 27.5 MHz 1 MB S MB 1-way Yes 1 Integer
1 external FPU
PCX PA 1.0
32-bit
1990 50 MHz 1 MB S MB 1-way Yes 1 Integer
1 external FPU
PA-7000 PA 1.1a
32-bit
1991 66 MHz 512 KB PBus/VSC 1-way 1 Integer
1 external FPU
PA-7100
PA-7150
PA 1.1b
32-bit
1992 125 MHz 3 MB PBus/VSC 2-way Yes 1 Integer
1 Floating Point
PA-7100LC PA 1.1c
32-bit
1994 100 MHz 1 KB
2 MB L2
GSC 2-way 2 Integer
1 Floating Point
MAX-1
PA-7200 PA 1.1d
32-bit
1995 140 MHz 2 KB
3 MB L2
Runway 2-way Yes 2 Integer
1 Floating Point
PA-7300LC PA 1.1e
32-bit
1996 180 MHz 128 KB
8 MB L2
GSC 2-way 2 Integer
1 Floating Point
MAX-1
PA-8000 PA 2.0
64-bit
1996 230 MHz 2 MB Runway 4-way Yes 4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8200 PA 2.0
64-bit
1997 300 MHz 4 MB Runway 4-way Yes 4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8500 PA 2.0
64-bit
1998 440 MHz 1.5 MB Runway 4-way Yes 4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8600 PA 2.0
64-bit
2000 550 MHz 1.5 MB Runway 4-way Yes 4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8700 PA 2.0
64-bit
2001 875 MHz 2.25 MB Runway 4-way Yes 4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8800
dual-core
PA 2.0
64-bit
2004 1GHz 2×1.5 MB
32 MB L2
Itanium 2 2×4-way Yes 2 cores, each:
4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8900
dual-core
PA 2.0
64-bit
2005 1.1GHz 2×1.5 MB
64 MB L2
Itanium 2 2×4-way Yes 2 cores, each:
4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-9000 VLIW
64-bit
dropped super-parallel

Several third-party PA-RISC processors were developed, some within the PRO consortium.

Other PA-RISC processors overview
CPU ISA Release Clock Cache Bus Super
scalar
Units Controllers
on-chip
Amiga Hombre PA 1.1
32-bit
1995 125 MHz ? 64-bit 1-way 1 Integer yes
Hitachi
PA/50L
PA 1.1
32-bit
1993 33 MHz 12 KB ? 1-way 1 Integer
1 Floating Point
Hitachi
PA/50M
PA 1.1
32-bit
1993 60 MHz 12 KB ? 1-way 1 Integer
1 Floating Point
Hitachi
HARP-1
PA 1.1
32-bit
1994 150 MHz 24 KB
1 MB L2
? 2-way 2 Integer
1 Floating Point
(Vector)
Winbond W89K PA 1.1
32-bit
1994 33/66 MHz 4 KB Intel 486 1-way 1 Integer
Winbond W90210
W90215
PA 1.1
32-bit
1997 33/66 MHz 12 KB Intel 486 1-way 1 Integer
MAX-1
yes
Winbond W90220
W90221
PA 1.1
32-bit
1999 150 MHz 8 KB Intel 486 1-way 1 Integer
1 DSP
MAX-1
yes
Oki OP32 PA 1.1
32-bit
1994 33 MHz ? ? 1-way 1 Integer yes

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