PA-RISC Processors

Overview

HP PA-RISC processors are based on a RISC architecture developed by HP in the 1980s and used in HP computers from the 1980s to the 2000s. There are three versions of PA-RISC architecture and processors: 32-bit PA-RISC 1.0 in the 1980s, 32-bit PA-RISC 1.1 in the 90s and the final 64-bit PA-RISC 2.0 until the 2000s.

The following PA-RISC processors have been designed by HP in its VLSI Technology Center (VTC) and Systems & VLSI Technology Operation (SVTO) since 1986.

HP PA-RISC processors overview
CPU	Architecture	Year	FETs	Clock up to	Cache max	Bus	Scalar	SMP	Units
FOCUS	FOCUS 32-bit stack	1982	450k NMOS	18 MHz	16 KB external	Custom	1-way	yes	INT FPU
TS-1	PA-RISC 1.0 32-bit RISC	1986	TTL	8 MHz	128 KB external	Custom	1-way		INT FPU
NS-1	PA-RISC 1.0 32-bit RISC	1987	144k NMOS	30 MHz	128 KB external	SMB	1-way		INT FPU
PRISM Apollo	PRISM 32-bit VLIW	1988	?	18 MHz	196 KB external	X-bus	3-wide	yes	INT FP
NS-2	PA-RISC 1.0 32-bit RISC	1989	183k NMOS	27.5 MHz	1 MB external	SMB	1-way	yes	INT FPU
PCX	PA-RISC 1.0 32-bit RISC	1990	196k	50 MHz	1 MB external	SMB	1-way	yes	INT FPU
PA-7000	PA-RISC 1.1a 32-bit RISC	1991	577k	66 MHz	512 KB external	PBus	1-way		INT FPU
PA-7100 PA-7150	PA-RISC 1.1b 32-bit RISC	1992	850k	125 MHz	3 MB external	PBus	2-way	yes	INT FP
PA-7100LC	PA-RISC 1.1c 32-bit RISC	1994	900k	100 MHz	1 KB 2 MB L2 external	GSC	2-way		2 INT FP MAX-1 MIOC
PA-7200	PA-RISC 1.1d 32-bit RISC	1995	1.3M	140 MHz	2 KB 3 MB L2 external	Runway	2-way	yes	2 INT FP
PA-7300LC	PA-RISC 1.1e 32-bit RISC	1996	9.2M	180 MHz	128 KB on-chip 8 MB L2 external	GSC	2-way		2 INT FP MAX-1 MIOC
PA-8000	PA-RISC 2.0 64-bit RISC	1996	3.8M	230 MHz	2 MB external	Runway	4-way	yes	4 INT 4 FP 2 L/S MAX-2
PA-8200	PA-RISC 2.0 64-bit RISC	1997	4.5M	300 MHz	4 MB external	Runway	4-way	yes	4 INT 4 FP 2 L/S MAX-2
PA-8500	PA-RISC 2.0 64-bit RISC	1998	140M	440 MHz	1.5 MB on-chip	Runway	4-way	yes	4 INT 4 FP 2 L/S MAX-2
PA-8600	PA-RISC 2.0 64-bit RISC	2000	140M	550 MHz	1.5 MB on-chip	Runway	4-way	yes	4 INT 4 FP 2 L/S MAX-2
PA-8700	PA-RISC 2.0 64-bit RISC	2001	186M	875 MHz	2.25 MB on-chip	Runway	4-way	yes	4 INT 4 FP 2 L/S MAX-2
PA-8800 dual-core	PA-RISC 2.0 64-bit RISC	2004	300M	1 GHz	2×1.5 MB on-chip 32 MB L2 external	Itanium 2	2×4-way	yes	2 cores 4 INT 4 FP 2 L/S MAX-2
PA-8900 dual-core	PA-RISC 2.0 64-bit RISC	2005	317M	1.1 GHz	2×1.5 MB on-chip 64 MB L2 external	Itanium 2	2×4-way	yes	2 cores 4 INT 4 FP 2 L/S MAX-2
PA-9000	PA-WideWord 64-bit VLIW	dropped		Explicitly Parallel Instruction Computing (EPIC)

Several third-party PA-RISC CPUs were developed during the 1990s, some in the PA-RISC PRO consortium, used in Asian PA-RISC OEM computers or integrated appliances.

Other PA-RISC processors overview
CPU	Architecture	Year	FETs	Clock	Cache	Bus	Scalar	Units	I/O
Amiga Hombre	PA-RISC 1.1 32-bit RISC	1995	?	125 MHz	?	64-bit	1-way	INT	multiple
Hitachi PA/50L	PA-RISC 1.1 32-bit RISC	1993	1.2M	33 MHz	12 KB	?	1-way	INT FP
Hitachi PA/50M	PA-RISC 1.1 32-bit RISC	1993	1.2M	60 MHz	12 KB	?	1-way	INT FP
Hitachi HARP-1	PA-RISC 1.1 32-bit RISC	1994	2.8M	120 MHz	24 KB 1 MB L2	?	2-way	2 INT FP
Hitachi HARP-1E	PA-RISC 1.1 32-bit RISC	1995	4.5M	150 MHz	32 KB 8 MB L2	?	2-way	2 INT FP Vector
Winbond W89K	PA-RISC 1.1 L0 32-bit RISC	1994	1.1M	33/66 MHz	4 KB	i486	1-way	INT
Winbond W90210 W90215	PA-RISC 1.1 L0 32-bit RISC	1997	?	33/66 MHz	12 KB	i486	1-way	INT MAX-1	multiple
Winbond W90220 W90221	PA-RISC 1.1 L0 32-bit RISC	1999	?	150 MHz	8 KB	i486	1-way	INT DSP MAX-1	multiple
Oki OP32	PA-RISC 1.1 32-bit RISC	1994	1.1M	33 MHz	?	?	1-way	INT	multiple

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