Sun MAJC VLIW

Sun MAJC
Sun © 2000

Sun MAJC is a VLIW architecture developed by Sun during the 1990s for media and signal processing with multiprocessor VLIW CPUs. Sun produced one MAJC processor in 1999, MAJC-5200, a high performance general purpose microprocessor for multimedia and Java processing.

MAJC is a scalable architecture that exploited multiple forms of parallelism, a hot topic of 1990s microarchitecture. Processors implementing MAJC were inherently multiprocessing (SMP) capable, had vertical micro-threading and used improved very long instruction word (VLIW) for parallel execution of multiple instructions per cycle.

Reviewers of the late 1990s were ecstatic: Doubts that VLIW has succeeded RISC as the most important influence on new microprocessor architectures vanished at the time when Sun pulled the latest example out of its hat: MAJC (pronounced magic).

Planned for multimedia PCs with Java (portals) and high-end graphics, Sun MAJC processor wound up in two Sun XVR accelerators in the early 2000s. Its 6 Gigaflops performance was downright scary but commercial success eluded the MAJC CPUs.

CPU details

Sun MAJC-5200, the only MAJC implementation, is a highly integrated microprocessor with two CPU cores, memory and I/O controller and central crossbar. It uses a VLIW architecture with DSP features for more than 12 GOPS and 6 GFLOPS performance.

Processor Clock Cache Width Units
MAJC-5200 dual 500 MHz 16/32 KB 4-way 2×4 FUs

Instruction set

Sun MAJC is a 32-bit VLIW architecture with variable length instructions of up to 128-bit with four instructions per packet and special SIMD operations. MACJ supports 8 to 64-bit integers and 32 to 64-bit IEEE floating point.

Sun MAJC can issue four instructions per clock, integrated into a single VLIW.

MAJC was not binary compatible to anything, it was a new architecture: not having binary compatibility (legacy) requirements opens the door for innovation.

Functional units

Sun MAJC
MAJC-5200 CPU © Sun 2000

Sun MAJC-5200 processors have two CPU cores with four functional units each: FU0 to FU3. The functional units can be viewed as a RISC/DSP processor in itself for parallel processing in eight functional units.

The four functional units per CPU core, FU0 and FU1-3, had slightly different roles in the processing stream of MAJC-5200 processors:

Each MAJC-5200 CPU core has 224 registers, 96 global and 128 local for the functional units (FUs). MAJC has a large unified register file.

Cache and memory

MAJC-5200 processors have a shared 16 KB data cache, four-way set associative. Each CPU core has its own 16 KB instruction cache, two-way set associative (LRU). All caches are on-chip.

Memory is implemented in Rambus DRAM, attached via 800 MHz 16-bit bus to the CPUs. Memory controller is on-chip of MAJC.

Cache data rate from CPU is 4 GB/s, main memory rate is 1.6 GB/s.

Integration and peripherals

Sun MAJC integrated many I/O and interface functions on chip.

Physical

Sun MAJC
Sun © 2000

MAJC-5200 has a clock speed of 500 MHz, with 1.8V core voltage. Die (220mm²) is manufactured in 0.22µ 6-layer copper CMOS process, packaged in ?, power 15W.

Follow-on MAJC-5200+ planned up to 750 MHz clock, with 1.5V core voltage. Die (130mm²) is manufactured in 0.18µ 7-layer copper CMOS process, power 15W.

Used in

MAJC-5200 was slated to become the primary microprocessor for graphics, especially 3D, telecommunications and document processing with a few core disciplines for the coming wave of networked information appliances in the late 1990s:

Sun planned a variety of products to use MAJC DSP and Java features:

Benchmarks

The MAJC architecture was geared towards multimedia and signal processing, with strengths in video and image computing, decoding and decompression, and between 60 and 90 million triangles per second in geometry processing.

* - 16-bit/single, ^ - 32-bit/double
** - in BOPS, billion operations per second = GOPS (Giga operations)
Processor Speed Platform MIPS/FLOPS SPEC92 int/fp
Sun MAJC-5200 500 MHz 13,000/6,160*
7,000/1,500^
Comparisons
Philips TM-1100 133 MHz 5,000**
Philips TM-1300 166 MHz 7,200**

Documentation

Product documentation

Papers

Articles

Annoucements

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