PA-RISC information - since 1999

HP 9000 V2200 and V2250

Quick Facts
Introduced 1997-1998
Period Maturity (III)
Series Mainframe
CPU 4-16 PA-8200
200-240 MHz
Caches 4 MB L1
RAM 16 GB
Design HyperPlane
Drives 16 SCSI
Expansion 24 PCI
I/O SCSI
Console

HP 9000 V2250 and V2250 are large-scale scalable PA-RISC servers, with up to sixteen 64-bit PA-RISC processors in a single cabinet. The architecture is a direct continuation from the Convex Exemplar. V2200 and V2250 use HP’s own HyperPlane crossbar chipset, consisting of four central crossbar ASICs and various other chipset components to attach memory, processors and I/O.

© Hewlett Packard 2000

V2200/V2250 use a very similar crossbar-based system design to 64-bit SPP2000 S-Class/X-Class, minus the SCI/TCI links for interconnecting several nodes into a larger system. Their V2500/V2600 successors were delivered again with interconnection technology.

V2200 and V2250 are controlled via so-called teststations with its own HP-UX operating system to control and monitor V-Class servers. This teststation is a standard HP 9000/712 workstation with special teststation hardware such as a second ethernet and serial boards and software. The teststation connects to the Core Utilities Board (CUB), which provides booting, system monitoring and diagnostics, and console connections via one LAN and one special serial link.

System architecture

Processors

System CPU Speed L1 cache
HP 9000 V2200 4-16 PA-8200 PA-RISC 64-bit 200 MHz 2/2 MB off-chip
HP 9000 V2250 4-16 PA-8200 PA-RISC 64-bit 240 MHz 2/2 MB off-chip

Chipset

  1. HP HyperPlane 8x8 crossbar, non-blocking, four Exemplar Routing Attachment controllers (ERACs), the central part of the system connects memory to processor buses and I/O channels. Eight ports for CPUs and I/O agents, each connects to two or four CPUs and one I/O channel, and eight ports for memory.
  2. Eight Exemplar Processor Agent controllers (EPACs) attach processors to the crossbar and provide access for each two processors Runway buses and one I/O controller to memory via the crossbar. Each EPAC communicates with two ERACs.
  3. Eight Exemplar PCI-bus Interface controller (EPICs) connect I/O channels and PCI buses to the EPACs.
  4. Eight Exemplar Memory Access controllers (EMACs) attach each an interleaved memory board to the Hyperplane crossbar.
  5. Exemplar Core Utilities board (ECUB) provides interrupts and the central system logic, it connects to the Exemplar system Routing board ENRB. The Core Logic Bus from the ECUB attaches to the devices on the EPACs. Included on the ECUB are two custom FPGAs, the Exemplar Processor Utilities controller EPUC and the Exemplar Monitoring Utilities controller EMUC.

» View a system-level ASCII illustration of the crossbar architecture.

The remainder of the system I/O consist of standard HP PCI controllers:

System buses

Memory

Expansion slots

Storage

External ports

Operating systems

Benchmarks

System SPEC95
int		 SPEC95
fp		 SPEC95
rate int		 SPEC95
rate fp
V2200 13.8 16-CPU: 22.1 1-CPU: 125
4-CPU: 484
8-CPU: 964
12-CPU: 1442
16-CPU: 1865		 1-CPU:
4-CPU: 755
8-CPU: 1380
12-CPU: 1909
16-CPU: 2312
V2250 16-CPU: 16.4 16-CPU: 24.8 16-CPU: 2209 16-CPU: 2471

Comparison to SPEC benchmark data from other Unix workstations and servers:

Based on old SPEC95rate archives
System Processor SPEC95
int		 SPEC95
fp		 SPEC95
rate int		 SPEC95
rate fp
DG AViiON AV 20000 16-CPU Pentium Pro 200 MHz 1007
DEC AlphaServer 8400 5/300 12-CPU 21164 300 MHz 33 (8P) 767 919
Siemens RM600 720 24-CPU R4400 250 MHz 921
HP 9000 D380 2-CPU PA-8000 180 MHz 12 17 210 221
HP 9000 K580 6-CPU PA-8200 240 MHz 17 (1P) 28 (1P) 902 849
HP 9000 T600 12-CPU PA-8000 180 MHz 12 15 1192 1151
Convex SPP1600 8-CPU PA-7200 120 MHz
16-CPU PA-7200 120 MHz
32-CPU PA-7200 120 MHz		 290
541
996		 383
744
1444
Convex SPP20000 8-CPU PA-8000 180 MHz
16-CPU PA-8000 180 MHz		 713
1307		 935
1413
HP Visualize C3600 1-CPU PA-8600 552 MHz 42 64 379 576

Dimensions

Height Width Depth Weight
1006mm 998mm 859mm 250kg

Documentation

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